[PATCH v2 01/13] dt-bindings: arm: msm: Update the maintainers for LLCC

From: Manivannan Sadhasivam
Date: Mon Dec 12 2022 - 07:33:56 EST


Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him
maintaining with a new identity. So his entry needs to be removed.

Also, Sai Prakash Ranjan's email address should be updated to use
quicinc domain.

Cc: Sai Prakash Ranjan <quic_saipraka@xxxxxxxxxxx>
Acked-by: Sai Prakash Ranjan <quic_saipraka@xxxxxxxxxxx>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
---
Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
index 38efcad56dbd..d1df49ffcc1b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Last Level Cache Controller

maintainers:
- - Rishabh Bhatnagar <rishabhb@xxxxxxxxxxxxxx>
- - Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
+ - Sai Prakash Ranjan <quic_saipraka@xxxxxxxxxxx>

description: |
LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
--
2.25.1