[PATCH 2/5] dt-bindings: mmc: sdhci-am654: cleanup style

From: Krzysztof Kozlowski
Date: Sun Dec 04 2022 - 04:47:38 EST


Cleanup coding style without functional changes:
1. Drop unnecessary quotes from $ref.
2. Use simple enum for compatible enumeration and sort entries.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
.../devicetree/bindings/mmc/sdhci-am654.yaml | 61 ++++++++++---------
1 file changed, 31 insertions(+), 30 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
index c4c73ee1422c..676a74695389 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml
@@ -2,8 +2,8 @@
# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
%YAML 1.2
---
-$id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#";
-$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+$id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI AM654 MMC Controller

@@ -16,12 +16,13 @@ allOf:
properties:
compatible:
oneOf:
- - const: ti,am654-sdhci-5.1
- - const: ti,j721e-sdhci-8bit
- - const: ti,j721e-sdhci-4bit
- - const: ti,am64-sdhci-8bit
- - const: ti,am64-sdhci-4bit
- - const: ti,am62-sdhci
+ - enum:
+ - ti,am62-sdhci
+ - ti,am64-sdhci-4bit
+ - ti,am64-sdhci-8bit
+ - ti,am654-sdhci-5.1
+ - ti,j721e-sdhci-4bit
+ - ti,j721e-sdhci-8bit
- items:
- const: ti,j7200-sdhci-8bit
- const: ti,j721e-sdhci-8bit
@@ -59,67 +60,67 @@ properties:

ti,otap-del-sel-legacy:
description: Output tap delay for SD/MMC legacy timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-mmc-hs:
description: Output tap delay for MMC high speed timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-sd-hs:
description: Output tap delay for SD high speed timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-sdr12:
description: Output tap delay for SD UHS SDR12 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-sdr25:
description: Output tap delay for SD UHS SDR25 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-sdr50:
description: Output tap delay for SD UHS SDR50 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-sdr104:
description: Output tap delay for SD UHS SDR104 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-ddr50:
description: Output tap delay for SD UHS DDR50 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-ddr52:
description: Output tap delay for eMMC DDR52 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-hs200:
description: Output tap delay for eMMC HS200 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,otap-del-sel-hs400:
description: Output tap delay for eMMC HS400 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

@@ -129,55 +130,55 @@ properties:

ti,itap-del-sel-legacy:
description: Input tap delay for SD/MMC legacy timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-mmc-hs:
description: Input tap delay for MMC high speed timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-sd-hs:
description: Input tap delay for SD high speed timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-sdr12:
description: Input tap delay for SD UHS SDR12 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-sdr25:
description: Input tap delay for SD UHS SDR25 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-ddr50:
description: Input tap delay for MMC DDR50 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,itap-del-sel-ddr52:
description: Input tap delay for MMC DDR52 timing
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0x1f

ti,trm-icp:
description: DLL trim select
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 0xf

ti,driver-strength-ohm:
description: DLL drive strength in ohms
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32
enum:
- 33
- 40
@@ -187,11 +188,11 @@ properties:

ti,strobe-sel:
description: strobe select delay for HS400 speed mode.
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32

ti,clkbuf-sel:
description: Clock Delay Buffer Select
- $ref: "/schemas/types.yaml#/definitions/uint32"
+ $ref: /schemas/types.yaml#/definitions/uint32

ti,fails-without-test-cd:
$ref: /schemas/types.yaml#/definitions/flag
--
2.34.1