Re: [PATCH bpf] riscv, bpf: Emit fixed-length imm64 for BPF_PSEUDO_FUNC

From: Björn Töpel
Date: Wed Nov 30 2022 - 11:04:12 EST


Björn Töpel <bjorn@xxxxxxxxxx> writes:

> The range of valid address for RV64 (sv39 to sv57) are
> 0xffffffff00000000 to 0xffffffffffffffff, so I think we can do better
> than 6 insn, no? My gut feeling (I need to tinker a bit) is that 4
> should be sufficient.

Ok, thinking a bit more about it; A proper address will at have at least
2B alignment, so that means that we can construct an address with lui,
addi, and slli (31 bits).

u64 addr = 0xffffffff12345678;

u32 (imm |= 0xffffffffUL) >> 1;
u32 upper = (imm + (1 << 11)) >> 12;
u32 lower = imm & 0xfff;
u32 rupper = upper | 0x80000; // for sign extend

NB! Make sure it's !C insn, and emit:

lui xx, rupper
addi xx, xx, lower
slli xx, xx, 1

Now we'll have fixed three insns. WDYT?


Björn