Re: [PATCH v11 1/3] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver

From: Will Deacon
Date: Fri Nov 18 2022 - 11:42:14 EST


On Thu, Nov 17, 2022 at 04:34:15PM +0800, Jiucheng Xu wrote:
> Add support for Amlogic Meson G12 Series SOC - DDR bandwidth PMU driver
> framework and interfaces. The PMU can not only monitor the total DDR
> bandwidth, but also individual IP module bandwidth.
>
> Signed-off-by: Jiucheng Xu <jiucheng.xu@xxxxxxxxxxx>
> Tested-by: Chris Healy <healych@xxxxxxxxx>

amzon.com?

> +static umode_t meson_ddr_perf_format_attr_visible(struct kobject *kobj,
> + struct attribute *attr,
> + int n)
> +{
> + struct pmu *pmu = dev_get_drvdata(kobj_to_dev(kobj));
> + struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
> + const u64 *capability = ddr_pmu->info.hw_info->capability;
> + struct device_attribute *dev_attr;
> + int id;
> + char value[20]; // config1:xxx, 20 is enough
> +
> + dev_attr = container_of(attr, struct device_attribute, attr);
> + dev_attr->show(NULL, NULL, value);
> +
> + if (sscanf(value, "config1:%d", &id) == 1)
> + return capability[0] & (1 << id) ? attr->mode : 0;
> +
> + if (sscanf(value, "config2:%d", &id) == 1)
> + return capability[1] & (1 << id) ? attr->mode : 0;

Should these be '(1ULL << id)' to avoid shifting beyond the side of the
32-bit type?

Will