Re: [PATCH] arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel property

From: Nishanth Menon
Date: Mon Nov 14 2022 - 22:44:04 EST


On 16:52-20221107, Bhavya Kapoor wrote:
> According to latest errata of J721e [1], HS400 mode is not supported
> in MMCSD0 subsystem (i2024) . Speed modes supported has been already
> updated in PATCH eb8f6194e807. 'ti,strobe-sel' property is only

eb8f6194e807 isn't a PATCH :) See
Documentation/process/submitting-patches.rst line 99 as an example how
to refer to specific commits.

> required by HS400 speed mode and thus needs to be removed from kernel
> dtsi for J721e soc.

s/soc/SoC

>
> 'ti,strobe-sel' is read in sdhci_am654.c line 733 and gets stored in
> sdhci_am654->strb_sel. This sdhci_am654->strb_sel is used at only one
> place in sdhci_am654.c line 291 which will only get used if HS400
> is enabled.

Please don't describe driver behavior in device tree patch. DT binding
should indicate the property behavior.

>
> Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e soc.
>
> [.] https://www.ti.com/lit/er/sprz455/sprz455.pdf

Should be [1] ?

I think we could simplify it by saying that the commit that implemented
the patch missed dropping ti,strobe-sel property that is only meant for
HS400. (please rephrase appropriately).

Documentation/devicetree/bindings/mmc/sdhci-am654.yaml

Now, that said - this could be enforced in dt-schema to prevent such a
miss from taking place (if then required)

Might be a case to post a separate patch for the enforcement?

>
> Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems")
> Signed-off-by: Bhavya Kapoor <b-kapoor@xxxxxx>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 917c9dc99efa..e4748a838d83 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1094,7 +1094,6 @@
> ti,itap-del-sel-mmc-hs = <0xa>;
> ti,itap-del-sel-ddr52 = <0x3>;
> ti,trm-icp = <0x8>;
> - ti,strobe-sel = <0x77>;
> dma-coherent;
> };
>
> --
> 2.20.1
>

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D