Re: [PATCH v7 18/20] PCI: dwc: Combine iATU detection procedures

[Manivannan Sadhasivam]

On Sun, Nov 13, 2022 at 10:12:59PM +0300, Serge Semin wrote:
> Since the iATU CSR region is now retrieved in the DW PCIe resources getter
> there is no much benefits in the iATU detection procedures splitting up.
> Therefore let's join the iATU unroll/viewport detection procedure with the
> rest of the iATU parameters detection code. The resultant method will be
> as coherent as before, while the redundant functions will be eliminated
> thus producing more readable code.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>

Thanks,
Mani

> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> 
> ---
> 
> Changelog v3:
> - This is a new patch created on v3 lap of the series.
> ---
>  drivers/pci/controller/dwc/pcie-designware.c | 39 +++++---------------
>  1 file changed, 10 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index a8436027434d..d31f9d41d5cb 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -628,26 +628,21 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci, u32 link_gen)
>  
>  }
>  
> -static bool dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci)
> -{
> -	u32 val;
> -
> -	val = dw_pcie_readl_dbi(pci, PCIE_ATU_VIEWPORT);
> -	if (val == 0xffffffff)
> -		return true;
> -
> -	return false;
> -}
> -
> -static void dw_pcie_iatu_detect_regions(struct dw_pcie *pci)
> +void dw_pcie_iatu_detect(struct dw_pcie *pci)
>  {
>  	int max_region, ob, ib;
>  	u32 val, min, dir;
>  	u64 max;
>  
> -	if (dw_pcie_cap_is(pci, IATU_UNROLL)) {
> +	val = dw_pcie_readl_dbi(pci, PCIE_ATU_VIEWPORT);
> +	if (val == 0xFFFFFFFF) {
> +		dw_pcie_cap_set(pci, IATU_UNROLL);
> +
>  		max_region = min((int)pci->atu_size / 512, 256);
>  	} else {
> +		pci->atu_base = pci->dbi_base + PCIE_ATU_VIEWPORT_BASE;
> +		pci->atu_size = PCIE_ATU_VIEWPORT_SIZE;
> +
>  		dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT, 0xFF);
>  		max_region = dw_pcie_readl_dbi(pci, PCIE_ATU_VIEWPORT) + 1;
>  	}
> @@ -689,23 +684,9 @@ static void dw_pcie_iatu_detect_regions(struct dw_pcie *pci)
>  	pci->num_ib_windows = ib;
>  	pci->region_align = 1 << fls(min);
>  	pci->region_limit = (max << 32) | (SZ_4G - 1);
> -}
> -
> -void dw_pcie_iatu_detect(struct dw_pcie *pci)
> -{
> -	if (dw_pcie_iatu_unroll_enabled(pci)) {
> -		dw_pcie_cap_set(pci, IATU_UNROLL);
> -	} else {
> -		pci->atu_base = pci->dbi_base + PCIE_ATU_VIEWPORT_BASE;
> -		pci->atu_size = PCIE_ATU_VIEWPORT_SIZE;
> -	}
> -
> -	dw_pcie_iatu_detect_regions(pci);
> -
> -	dev_info(pci->dev, "iATU unroll: %s\n", dw_pcie_cap_is(pci, IATU_UNROLL) ?
> -		"enabled" : "disabled");
>  
> -	dev_info(pci->dev, "iATU regions: %u ob, %u ib, align %uK, limit %lluG\n",
> +	dev_info(pci->dev, "iATU: unroll %s, %u ob, %u ib, align %uK, limit %lluG\n",
> +		 dw_pcie_cap_is(pci, IATU_UNROLL) ? "T" : "F",
>  		 pci->num_ob_windows, pci->num_ib_windows,
>  		 pci->region_align / SZ_1K, (pci->region_limit + 1) / SZ_1G);
>  }
> -- 
> 2.38.1
> 
> 

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