Re: [PATCH v6 2/2] dt-bindings: PCI: xilinx-nwl: Convert to YAML schemas of Xilinx NWL PCIe Root Port Bridge

From: Rob Herring
Date: Fri Nov 11 2022 - 13:30:09 EST



On Fri, 11 Nov 2022 11:07:09 +0530, Thippeswamy Havalige wrote:
> Convert to YAML schemas for Xilinx NWL PCIe Root Port Bridge
> dt binding.
>
> Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx>
> ---
> changes in v6:
> Added maxItems to clocks property.
>
> .../bindings/pci/xilinx-nwl-pcie.txt | 73 ---------
> .../bindings/pci/xlnx,nwl-pcie.yaml | 149 ++++++++++++++++++
> 2 files changed, 149 insertions(+), 73 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt
> create mode 100644 Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
>

Applied, thanks!