[PATCH 04/10] arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level

From: Andrew Davis
Date: Mon Oct 17 2022 - 15:26:34 EST


EPWM nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the EPWM nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 9 +++++
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 36 -------------------
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 44 ------------------------
3 files changed, 9 insertions(+), 80 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 375078ca4fdd..672575f44529 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -898,6 +898,7 @@ epwm0: pwm@23000000 {
power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm1: pwm@23010000 {
@@ -907,6 +908,7 @@ epwm1: pwm@23010000 {
power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm2: pwm@23020000 {
@@ -916,6 +918,7 @@ epwm2: pwm@23020000 {
power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm3: pwm@23030000 {
@@ -925,6 +928,7 @@ epwm3: pwm@23030000 {
power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm4: pwm@23040000 {
@@ -934,6 +938,7 @@ epwm4: pwm@23040000 {
power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm5: pwm@23050000 {
@@ -943,6 +948,7 @@ epwm5: pwm@23050000 {
power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm6: pwm@23060000 {
@@ -952,6 +958,7 @@ epwm6: pwm@23060000 {
power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm7: pwm@23070000 {
@@ -961,6 +968,7 @@ epwm7: pwm@23070000 {
power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

epwm8: pwm@23080000 {
@@ -970,6 +978,7 @@ epwm8: pwm@23080000 {
power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};

ecap0: pwm@23100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 12d971c3bc3a..cef3afa10c39 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -580,42 +580,6 @@ &ecap2 {
status = "disabled";
};

-&epwm0 {
- status = "disabled";
-};
-
-&epwm1 {
- status = "disabled";
-};
-
-&epwm2 {
- status = "disabled";
-};
-
-&epwm3 {
- status = "disabled";
-};
-
-&epwm4 {
- status = "disabled";
-};
-
-&epwm5 {
- status = "disabled";
-};
-
-&epwm6 {
- status = "disabled";
-};
-
-&epwm7 {
- status = "disabled";
-};
-
-&epwm8 {
- status = "disabled";
-};
-
&icssg0_mdio {
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 1a116593a771..51f4ae165c13 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -579,50 +579,6 @@ &ecap2 {
status = "disabled";
};

-&epwm0 {
- status = "disabled";
-};
-
-&epwm1 {
- status = "disabled";
-};
-
-&epwm2 {
- status = "disabled";
-};
-
-&epwm3 {
- status = "disabled";
-};
-
-&epwm4 {
- /*
- * EPWM4_A, EPWM4_B is available on Pin 32 and 33 on J4 (RPi hat)
- * But RPi Hat will be used for other use cases, so marking epwm4 as disabled.
- */
- status = "disabled";
-};
-
-&epwm5 {
- /*
- * EPWM5_A, EPWM5_B is available on Pin 29 and 31 on J4 (RPi hat)
- * But RPi Hat will be used for other use cases, so marking epwm5 as disabled.
- */
- status = "disabled";
-};
-
-&epwm6 {
- status = "disabled";
-};
-
-&epwm7 {
- status = "disabled";
-};
-
-&epwm8 {
- status = "disabled";
-};
-
&icssg0_mdio {
status = "disabled";
};
--
2.37.3