Re: [PATCH 2/2] memory: renesas-rpc-if: Add support for R-Car Gen4

From: Wolfram Sang
Date: Thu Oct 13 2022 - 08:11:50 EST


On Wed, Oct 12, 2022 at 04:01:52PM +0200, Geert Uytterhoeven wrote:
> The SPI Multi I/O Bus Controller (RPC-IF) on R-Car Gen4 SoCs is very
> similar to the RPC-IF on R-Car Gen3 SoCs. It does support four instead
> of three bits of strobe timing adjustment (STRTIM), and thus requires a
> new mask and new settings.
>
> Inspired by a patch in the BSP by Cong Dang.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Reviewed-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>

> +#define RPCIF_PHYCNT_STRTIM(v) (((v) & 0x7) << 15 | ((v) & 0x8) << 24) /* valid for R-Car and RZ/G2{E,H,M,N} */

Very minor but I spent a minute to get it: To make sure the reader
easily understands that we want to set bit 27, we could make that maybe
more clear with:

... | !!((v) & 0x8) << 27)

But if you prefer, we can keep it like this.

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