Re: [PATCH 1/2] arm64: dts: qcom: sm6125: Add i2c and SPI pin configuration

[Krzysztof Kozlowski]

On 01/10/2022 20:56, Martin Botka wrote:
> This commit adds configuration for I2C and SPI
> pins used in SM6125 SoC

Do not use "This commit/patch".
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

> 
> Signed-off-by: Martin Botka <martin.botka@xxxxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/sm6125.dtsi | 547 +++++++++++++++++++++++++++
>  1 file changed, 547 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> index 85c52b64522e..350713742ccd 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> @@ -445,6 +445,553 @@ data {
>  					bias-pull-up;
>  				};
>  			};
> +
> +			/* qup_0 SE mappings */
> +			/* SE 0 pin mappings */
> +			qup_i2c0_default: qup-i2c0-default {

We are transitioning to more organized bindings, so this must have
"-stat" suffix.

See:
https://lore.kernel.org/linux-devicetree/20220925110608.145728-1-krzysztof.kozlowski@xxxxxxxxxx/T/#mc1409d1ff6b58c2a2622aaf838eb42170e76d48b

> +				mux {
> +					pins = "gpio0", "gpio1";
> +					function = "qup00";
> +				};
> +
> +				config {

Merge these nodes either in one node with "-pins" or just under above
"-state".

> +					pins = "gpio0", "gpio1";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +			};
> +			qup_i2c0_sleep: qup-i2c0-sleep {

-state

> +				mux {

Merge or -pins. This applies everywhere.

> +					pins = "gpio0", "gpio1";
> +					function = "gpio";
> +				};
> +
> +				config {
> +					pins = "gpio0", "gpio1";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +			};
> +
> +			/* SE 1 pin mappings */
> +			qup_i2c1_default: qup-i2c1-default {
> +				mux {
> +					pins = "gpio4", "gpio5";
> +					function = "qup01";
> +				};
> +
> +				config {
> +					pins = "gpio4", "gpio5";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +			};
> +			qup_i2c1_sleep: qup-i2c1-sleep {
> +				mux {
> +					pins = "gpio4", "gpio5";
> +					function = "gpio";
> +				};
> +
> +				config {
> +					pins = "gpio4", "gpio5";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +			};
> +
> +			/* SE 2 pin mappings */
> +			qup_i2c2_default: qup-i2c2-default {
> +				mux {
> +					pins = "gpio6", "gpio7";
> +					function = "qup02";
> +				};
> +
> +				config {
> +					pins = "gpio6", "gpio7";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +			};
> +			qup_i2c2_sleep: qup-i2c2-sleep {
> +				mux {
> +					pins = "gpio6", "gpio7";
> +					function = "gpio";
> +				};
> +
> +				config {
> +					pins = "gpio6", "gpio7";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +			};
> +
> +			/* SE 3 pin mappings */
> +			qup_i2c3_default: qup-i2c3-default {
> +				mux {
> +						pins = "gpio14", "gpio15";
> +						function = "qup03";
> +				};
> +
> +				config {
> +						pins = "gpio14", "gpio15";
> +						drive-strength = <2>;
> +						bias-disable;
> +				};
> +			};
> +
> +			qup_i2c3_sleep: qup-i2c3-sleep {
> +				mux {
> +						pins = "gpio14", "gpio15";
> +						function = "gpio";
> +				};
> +
> +				config {
> +						pins = "gpio14", "gpio15";
> +						drive-strength = <2>;
> +						bias-pull-up;
> +				};
> +			};
> +
> +			/* SE 4 pin mappings */
> +			qup_i2c4_default: qup-i2c4-default {
> +				mux {
> +						pins = "gpio16", "gpio17";
> +						function = "qup04";
> +				};
> +
> +				config {
> +						pins = "gpio16", "gpio17";
> +						drive-strength = <2>;
> +						bias-disable;
> +				};
> +			};
> +
> +			qup_i2c4_sleep: qup-i2c4-sleep {
> +				mux {
> +						pins = "gpio16", "gpio17";
> +						function = "gpio";
> +				};
> +
> +				config {
> +						pins = "gpio16", "gpio17";
> +						drive-strength = <2>;
> +						bias-pull-up;
> +				};
> +			};
> +
> +			/*qup_1 SE mappings */

Missing space after /*

> +			/* SE 5 pin mappings */
> +			qup_i2c5_default: qup-i2c5-default {
> +				mux {
> +						pins = "gpio22", "gpio23";
> +						function = "qup10";
> +				};
> +
> +				config {
> +						pins = "gpio22", "gpio23";
> +						drive-strength = <2>;
> +						bias-disable;
> +				};
> +			};


(...)

> +
> +			/* SE 6 pin mappings */
> +			qup_spi6_default: qup-spi6-default {
> +				mux {
> +					pins = "gpio30", "gpio31", "gpio32",
> +								"gpio33";
> +					function = "qup11";
> +				};
> +
> +				config {
> +					pins = "gpio30", "gpio31", "gpio32",
> +								"gpio33";
> +					drive-strength = <6>;
> +					bias-disable;
> +				};
> +			};
> +
> +			qup_spi6_sleep: qup-spi6-sleep {
> +				mux {
> +					pins = "gpio30", "gpio31", "gpio32",
> +								"gpio33";
> +					function = "gpio";
> +				};
> +
> +				configs {
> +					pins = "gpio30", "gpio31", "gpio32",
> +								"gpio33";
> +					drive-strength = <6>;
> +					bias-disable;
> +				};
> +			};
> +
> +			/* SE 8 pin mappings */
> +			qup_spi8_default: qup-spi8-default {
> +				mux {
> +					pins = "gpio18", "gpio19", "gpio20",
> +								"gpio21";

Wrong indentation. It should be aligned with previous gpio18 entry. This
applies everywhere.

> +					function = "qup13";
> +				};
> +


Best regards,
Krzysztof