Re: [PATCH v1] locking/memory-barriers.txt: Improve documentation for writel() usage

From: Joel Fernandes
Date: Thu Sep 29 2022 - 22:10:44 EST


Hi,

> On Sep 29, 2022, at 10:04 PM, Parav Pandit <parav@xxxxxxxxxx> wrote:
>
> The cited commit describes that when using writel(), explcit wmb()
> is not needed. wmb() is an expensive barrier. writel() uses the needed
> I/O barrier instead of expensive wmb().

Because you mentioned it in the commit message, Why not mention in the documentation text as well that writel() has the needed I/O barrier in it?

>
> Hence update the example to be more accurate that matches the current
> implementation.

That would make it more accurate, since accuracy is your goal.

thanks,

- Joel


>
> commit 5846581e3563 ("locking/memory-barriers.txt: Fix broken DMA vs. MMIO ordering example")
> Signed-off-by: Parav Pandit <parav@xxxxxxxxxx>
>
> ---
> changelog:
> v0->v1:
> - Corrected to mention I/O barrier instead of dma_wmb().
> - removed numbered references in commit log
> - corrected typo 'explcit' to 'explicit' in commit log
> ---
> Documentation/memory-barriers.txt | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
> index 832b5d36e279..2d77a7411e52 100644
> --- a/Documentation/memory-barriers.txt
> +++ b/Documentation/memory-barriers.txt
> @@ -1927,10 +1927,11 @@ There are some more advanced barrier functions:
> before we read the data from the descriptor, and the dma_wmb() allows
> us to guarantee the data is written to the descriptor before the device
> can see it now has ownership. The dma_mb() implies both a dma_rmb() and
> - a dma_wmb(). Note that, when using writel(), a prior wmb() is not needed
> - to guarantee that the cache coherent memory writes have completed before
> - writing to the MMIO region. The cheaper writel_relaxed() does not provide
> - this guarantee and must not be used here.
> + a dma_wmb(). Note that, when using writel(), a prior I/O barrier is not
> + needed to guarantee that the cache coherent memory writes have completed
> + before writing to the MMIO region. The cheaper writel_relaxed() does not
> + provide this guarantee and must not be used here. Hence, writeX() is always
> + preferred.
>
> See the subsection "Kernel I/O barrier effects" for more information on
> relaxed I/O accessors and the Documentation/core-api/dma-api.rst file for
> --
> 2.26.2
>