Re: [PATCH RESEND v2 5/5] clk: mxl: Add a missing flag to allow parent clock rate change

From: Rahul Tanwar
Date: Thu Sep 29 2022 - 01:47:08 EST


On 29/9/2022 8:18 am, Stephen Boyd wrote:
> This email was sent from outside of MaxLinear.
>
>
> Quoting Rahul Tanwar (2022-09-21 23:24:28)
>> One of the clock entry "dcl" clk's rate can only be changed by
>> changing its parent's clock rate. But it was missing to have
>> CLK_SET_RATE_PARENT flag as enabled.
>>
>> Add/enable CLK_SET_RATE_PARENT flag for dcl clk in order to
>> allow its clk rate to be changed via its parent's clk.
>>
>> Signed-off-by: Rahul Tanwar <rtanwar@xxxxxxxxxxxxx>
>> ---
>
> Any Fixes tag?
>


Missed it, will add in v3.

Thanks,
Rahul


>