Re: [PATCH v3 3/5] clk: qcom: gdsc: Add a reset op to poll gdsc collapse

From: Akhil P Oommen
Date: Wed Sep 28 2022 - 03:40:00 EST


On 9/27/2022 10:56 PM, Bjorn Andersson wrote:
On Fri, Aug 19, 2022 at 01:48:37AM +0530, Akhil P Oommen wrote:
Add a reset op compatible function to poll for gdsc collapse.

Signed-off-by: Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx>
---

(no changes since v2)

Changes in v2:
- Minor update to function prototype

drivers/clk/qcom/gdsc.c | 23 +++++++++++++++++++----
drivers/clk/qcom/gdsc.h | 7 +++++++
2 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 44520ef..2d0f1d1 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -17,6 +17,7 @@
#include <linux/reset-controller.h>
#include <linux/slab.h>
#include "gdsc.h"
+#include "reset.h"
#define PWR_ON_MASK BIT(31)
#define EN_REST_WAIT_MASK GENMASK_ULL(23, 20)
@@ -116,7 +117,8 @@ static int gdsc_hwctrl(struct gdsc *sc, bool en)
return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);
}
-static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status)
+static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status,
+ s64 timeout_us, unsigned int interval_ms)
{
ktime_t start;
@@ -124,7 +126,9 @@ static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status)
do {
if (gdsc_check_status(sc, status))
return 0;
- } while (ktime_us_delta(ktime_get(), start) < TIMEOUT_US);
+ if (interval_ms)
+ msleep(interval_ms);
You effectively msleep(5) here, for which you shouldn't use msleep() -
or more likely, this only happens in exceptional circumstances, so a
longer interval_ms seems reasonable.
By reducing the overall polling time here, we can reduce any user visible impact like missing frame/janks due to gpu hang/recovery. I kept 5ms here because in my local testing on sc7280 device I didn't see any benefit beyond decreasing below 5ms. Msleep() here also helps to quickly schedule other threads which holds pm_runtime refcount on cx_gdsc, which indirectly helps to reduce overall polling time here significantly in my testing.


+ } while (ktime_us_delta(ktime_get(), start) < timeout_us);
if (gdsc_check_status(sc, status))
return 0;
@@ -172,7 +176,7 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status)
udelay(1);
}
- ret = gdsc_poll_status(sc, status);
+ ret = gdsc_poll_status(sc, status, TIMEOUT_US, 0);
WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n");
if (!ret && status == GDSC_OFF && sc->rsupply) {
@@ -343,7 +347,7 @@ static int _gdsc_disable(struct gdsc *sc)
*/
udelay(1);
- ret = gdsc_poll_status(sc, GDSC_ON);
+ ret = gdsc_poll_status(sc, GDSC_ON, TIMEOUT_US, 0);
if (ret)
return ret;
}
@@ -565,3 +569,14 @@ int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain)
return 0;
}
EXPORT_SYMBOL_GPL(gdsc_gx_do_nothing_enable);
+
+int gdsc_wait_for_collapse(void *priv)
+{
+ struct gdsc *sc = priv;
+ int ret;
+
+ ret = gdsc_poll_status(sc, GDSC_OFF, 500000, 5);
So I presume the GPU driver will put() the GDSC and then issue a reset,
which will wait up to 5 seconds for the GDSC to be turned off.
Not exactly. GPU driver will put() its GDSC vote and will wait for 500ms to allow other clients to drop their vote and the cx_gdsc to finally collapse at hw. There is no hw interface to 'reset' entire GPU subsystem. We have to pull the plug on gdsc to reset it.

So essentially, this logic is needed because we don't wait for VOTABLE
GDSCs to be turned off? And we have no way to do the put-with-wait for
this specific case.

I would like the commit message to capture this reasoning.
Agree. Will post a new patchset once we have consensus on the rest of the things here.

-Akhil.

Thanks,
Bjorn

+ WARN(ret, "%s status stuck at 'on'", sc->pd.name);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(gdsc_wait_for_collapse);
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index ad313d7..d484bdb 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -12,6 +12,7 @@
struct regmap;
struct regulator;
struct reset_controller_dev;
+struct qcom_reset_map;
/**
* struct gdsc - Globally Distributed Switch Controller
@@ -79,6 +80,7 @@ int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
struct regmap *);
void gdsc_unregister(struct gdsc_desc *desc);
int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain);
+int gdsc_wait_for_collapse(void *priv);
#else
static inline int gdsc_register(struct gdsc_desc *desc,
struct reset_controller_dev *rcdev,
@@ -88,5 +90,10 @@ static inline int gdsc_register(struct gdsc_desc *desc,
}
static inline void gdsc_unregister(struct gdsc_desc *desc) {};
+
+static int gdsc_wait_for_collapse(void *priv)
+{
+ return -ENOSYS;
+}
#endif /* CONFIG_QCOM_GDSC */
#endif /* __QCOM_GDSC_H__ */
--
2.7.4