Re: [PATCH v5 20/20] PCI: dwc: Add Baikal-T1 PCIe controller support

From: Robin Murphy
Date: Mon Sep 26 2022 - 10:46:49 EST


On 2022-09-12 01:25, Serge Semin wrote:
On Wed, Aug 31, 2022 at 09:54:14AM +0100, Robin Murphy wrote:
On 2022-08-31 09:36, Robin Murphy wrote:
On 2022-08-29 16:28, Lorenzo Pieralisi wrote:
[...]
+static int bt1_pcie_add_port(struct bt1_pcie *btpci)
+{
+��� struct device *dev = &btpci->pdev->dev;
+��� int ret;
+
+��� /*
+���� * DW PCIe Root Port controller is equipped with eDMA capable of
+���� * working with the 64-bit memory addresses.
+���� */
+��� ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
+��� if (ret)
+������� return ret;

Is this the right place to set the DMA mask for the host controller
embedded DMA controller (actually, the dev pointer is the _host_
controller device) ?

How this is going to play when combined with:

https://lore.kernel.org/linux-pci/1e63a581-14ae-b4b5-a5bf-ca8f09c33af6@xxxxxxx

It is getting a bit confusing. I believe the code in the link
above sets the mask so that through the DMA API we are capable
of getting an MSI doorbell virtual address whose physical address
can be addressed by the endpoint; this through the DMA API.

This patch is setting the DMA mask for a different reason, namely
setting the host controller embedded DMA controller addressing
capabilities.

AFAICS - both approaches set the mask for the same device - now
the question is about which one is legitimate and how to handle
the other.

Assuming the dw-edma-pcie driver is the relevant one, that already sets
its own masks on its own device, so I also don't see why this is here.


Ah, I just found the patch at [1], which further implies that this is indeed
completely bogus.

Really? Elaborate please. What you said in the comment to that patch
has nothing to do with the change you comment here.

It has everything to do with it; if the other driver did the right thing, this change wouldn't even be here. Everything you've said has implied that the DMA engine driver cares about the AXI side of the bridge, which is represented by the platform device. Thus it should set the platform device's DMA mask, and use the platform device for DMA API calls, and thus there should be no conflict with the host controller driver's use of the PCI device's DMA mask to reserve a DMA address in PCI memory space on the other side of the bridge, nor any translation across the bridge itself.

Thanks,
Robin.