[PATCH v9 4/4] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support

From: Richard Zhu
Date: Mon Sep 26 2022 - 03:00:50 EST


Add i.MX8MP PCIe PHY support.

Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Tested-by: Marek Vasut <marex@xxxxxxx>
Tested-by: Richard Leitner <richard.leitner@xxxxxxxxxxx>
Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
---
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
index 9752818fe990..63636994d673 100644
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
@@ -48,6 +48,7 @@

enum imx8_pcie_phy_type {
IMX8MM,
+ IMX8MP,
};

struct imx8_pcie_phy_drvdata {
@@ -60,6 +61,7 @@ struct imx8_pcie_phy {
struct clk *clk;
struct phy *phy;
struct regmap *iomuxc_gpr;
+ struct reset_control *perst;
struct reset_control *reset;
u32 refclk_pad_mode;
u32 tx_deemph_gen1;
@@ -87,6 +89,9 @@ static int imx8_pcie_phy_init(struct phy *phy)
writel(imx8_phy->tx_deemph_gen2,
imx8_phy->base + PCIE_PHY_TRSV_REG6);
break;
+ case IMX8MP:
+ reset_control_assert(imx8_phy->perst);
+ break;
}

if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
@@ -141,6 +146,9 @@ static int imx8_pcie_phy_init(struct phy *phy)
IMX8MM_GPR_PCIE_CMN_RST);

switch (imx8_phy->drvdata->variant) {
+ case IMX8MP:
+ reset_control_deassert(imx8_phy->perst);
+ fallthrough;
case IMX8MM:
reset_control_deassert(imx8_phy->reset);
usleep_range(200, 500);
@@ -181,10 +189,16 @@ static const struct imx8_pcie_phy_drvdata drvdata[] = {
.variant = IMX8MM,
.gpr = "fsl,imx8mm-iomuxc-gpr",
},
+
+ [IMX8MP] = {
+ .variant = IMX8MP,
+ .gpr = "fsl,imx8mp-iomuxc-gpr",
+ },
};

static const struct of_device_id imx8_pcie_phy_of_match[] = {
{.compatible = "fsl,imx8mm-pcie-phy", .data = &drvdata[IMX8MM], },
+ {.compatible = "fsl,imx8mp-pcie-phy", .data = &drvdata[IMX8MP], },
{ },
};
MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
@@ -240,6 +254,15 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev)
return PTR_ERR(imx8_phy->reset);
}

+ if (imx8_phy->drvdata->variant == IMX8MP) {
+ imx8_phy->perst =
+ devm_reset_control_get_exclusive(dev, "perst");
+ if (IS_ERR(imx8_phy->perst)) {
+ dev_err(dev, "Failed to get PCIE PHY PERST control\n");
+ return PTR_ERR(imx8_phy->perst);
+ }
+ }
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
imx8_phy->base = devm_ioremap_resource(dev, res);
if (IS_ERR(imx8_phy->base))
--
2.25.1