[PATCH] libata/ahci: quirk for JMB585/JMB582

[MD Lin]

This patch adds a quirk, which enable error bit handling functions
and SATA configuration for JMicron JMB585/JMB582.

Signed-off-by: MD Lin <mdlin@xxxxxxxxxxx>
---
 drivers/ata/ahci.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 505920d45..b0768fae3 100755
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1657,6 +1657,68 @@ static void ahci_intel_pcs_quirk(struct pci_dev *pdev, struct ahci_host_priv *hp
 	}
 }
 
+static void ahci_jmb585_write_sata_phy(void __iomem *mmio, u32 addr, u32 data)
+{
+	writel((addr & 0x01FFFUL) + (1UL << 18UL), mmio + 0xC0);
+	writel(data, mmio + 0xC8);
+}
+
+static void ahci_jmicron_585_quirk(void __iomem *mmio)
+{
+	u32 pi = readl(mmio + HOST_PORTS_IMPL);
+	u32 b8_data;
+
+	/*
+	 * enable error bit handling functions, these might overwrite
+	 * the setting which loads from external SPI flash
+	 */
+	b8_data = (pi > 3) ? 0x13 : 0x92;
+	writel(0x03060004+b8_data, mmio + 0xB8);
+	writel(0x00FF0B01,         mmio + 0x30);
+	writel(0x0000003F,         mmio + 0x34);
+	writel(0x0000001F,         mmio + 0x38);
+	writel(0x03060000+b8_data, mmio + 0xB8);
+	writel(0xF9E4EFBF,         mmio + 0xB0);
+
+	/*
+	 * set SATA configuration, these might overwrite
+	 * the setting which loads from external SPI flash
+	 */
+	ahci_jmb585_write_sata_phy(mmio, 0x06, 0x70005BE3); /* port0 */
+	ahci_jmb585_write_sata_phy(mmio, 0x13, 0x70005BE3); /* port1 */
+	ahci_jmb585_write_sata_phy(mmio, 0x73, 0x000001E5); /* port0 */
+	ahci_jmb585_write_sata_phy(mmio, 0x75, 0x000001E5); /* port1 */
+	ahci_jmb585_write_sata_phy(mmio, 0x74, 0x00000024); /* port0 */
+	ahci_jmb585_write_sata_phy(mmio, 0x80, 0x250B0003); /* port1 */
+	if (pi > 3) {
+		ahci_jmb585_write_sata_phy(mmio, 0x20, 0x70005BE3); /* port2 */
+		ahci_jmb585_write_sata_phy(mmio, 0x2D, 0x70005BE3); /* port3 */
+		ahci_jmb585_write_sata_phy(mmio, 0x3A, 0x70005BE3); /* port4 */
+		ahci_jmb585_write_sata_phy(mmio, 0x79, 0x000001E5); /* port3 */
+		ahci_jmb585_write_sata_phy(mmio, 0x83, 0x250B0003); /* port3 */
+		ahci_jmb585_write_sata_phy(mmio, 0x7A, 0x00000024); /* port3 */
+		ahci_jmb585_write_sata_phy(mmio, 0x84, 0x250B0003); /* port3 */
+	}
+}
+
+static void ahci_jmicron_quirk(struct pci_dev *pdev,
+			struct ahci_host_priv *hpriv)
+{
+	void __iomem *mmio = hpriv->mmio;
+	u8 tmp8;
+
+	if (pdev->vendor != PCI_VENDOR_ID_JMICRON)
+		return;
+
+	switch (pdev->device) {
+	case 0x585: /* check if the chip is JMB585 */
+		tmp8 = readb(mmio + 0x44);
+		if (tmp8)
+			ahci_jmicron_585_quirk(mmio);
+		break;
+	}
+}
+
 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	unsigned int board_id = ent->driver_data;
@@ -1775,6 +1837,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 	 */
 	ahci_intel_pcs_quirk(pdev, hpriv);
 
+	/* set JMicron configuration */
+	ahci_jmicron_quirk(pdev, hpriv);
+
 	/* prepare host */
 	if (hpriv->cap & HOST_CAP_NCQ) {
 		pi.flags |= ATA_FLAG_NCQ;
-- 
2.17.1