[PATCH 0/4] KVM: x86/svm/pmu: Add AMD Guest PerfMonV2 support

From: Like Xu
Date: Mon Sep 05 2022 - 08:44:09 EST


Starting with Zen4, core PMU on AMD platforms such as Genoa and
Ryzen-7000 will support PerfMonV2, and it is also compatible with
legacy PERFCTR_CORE behavior and msr addresses.

If you don't have access to the hardware specification, the commits
d6d0c7f681fd..7685665c390d for host perf can also bring a quick
overview. Its main change is the addition of three msr's equivalent
to Intel V2, namely global_ctrl, global_status, global_status_clear.

It is worth noting that this feature is very attractive for reducing the
overhead of PMU virtualization, since multiple msr accesses to multiple
counters will be replaced by a single access to the global register,
plus more accuracy gain when multiple guest counters are used.

The KVM part is based on the latest vPMU fixes patch set [1], while
the kvm-unit-test patch relies on preemptive test cases effort [2] for
testing leagcy AMD vPMU, which didn't exist before.

All related testcases are passed on a Genoa box.
Please feel free to run more tests, add more or share comments.

[1] https://lore.kernel.org/kvm/20220831085328.45489-1-likexu@xxxxxxxxxxx/
[2] https://lore.kernel.org/kvm/20220819110939.78013-1-likexu@xxxxxxxxxxx/

Like Xu (3):
KVM: x86/svm/pmu: Limit the maximum number of supported GP counters
KVM: x86/pmu: Make part of the Intel v2 PMU MSRs handling x86 generic
KVM: x86/svm/pmu: Add AMD PerfMonV2 support

Sandipan Das (1):
KVM: x86/cpuid: Add AMD CPUID ExtPerfMonAndDbg leaf 0x80000022

arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 -
arch/x86/include/asm/perf_event.h | 8 ++++
arch/x86/kvm/cpuid.c | 21 +++++++-
arch/x86/kvm/pmu.c | 61 ++++++++++++++++++++++--
arch/x86/kvm/pmu.h | 32 ++++++++++++-
arch/x86/kvm/svm/pmu.c | 66 +++++++++++++++++---------
arch/x86/kvm/vmx/pmu_intel.c | 58 +---------------------
arch/x86/kvm/x86.c | 13 +++++
8 files changed, 173 insertions(+), 87 deletions(-)

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2.37.3