Re: [PATCH RESEND v8 4/5] dt-bindings: nand: meson: convert txt to yaml

From: Liang Yang
Date: Mon Sep 05 2022 - 03:37:17 EST


Hi Neil,

Thanks for your remind.
I will add the ML in next resend version quickly.

On 2022/9/5 15:22, Neil Armstrong wrote:
[ EXTERNAL EMAIL ]

+CC [devicetree@xxxxxxxxxxxxxxx]

Please Add this ML to CC if you resend, it's the last patch of the serie that haven't got a proper review.

On 22/08/2022 11:18, Liang Yang wrote:
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml

Signed-off-by: Liang Yang <liang.yang@xxxxxxxxxxx>
---
  .../bindings/mtd/amlogic,meson-nand.txt       | 55 ------------
  .../bindings/mtd/amlogic,meson-nand.yaml      | 88 +++++++++++++++++++
  2 files changed, 88 insertions(+), 55 deletions(-)
  delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
  create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
-  - "amlogic,meson-gxl-nfc"
-  - "amlogic,meson-axg-nfc"
-
-- reg        : Offset and length of the register set
-
-- reg-names  : "nfc" is the register set for NFC controller and "emmc"
-        is the register set for MCI controller.
-
-- clocks     :
-    A list of phandle + clock-specifier pairs for the clocks listed
-    in clock-names.
-
-- clock-names: Should contain the following:
-    "core" - NFC module gate clock
-    "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
-    nand-controller@7800 {
-        compatible = "amlogic,meson-axg-nfc";
-        reg = <0x0 0x7800 0x0 0x100>,
-              <0x0 0x7000 0x0 0x800>;
-        reg-names = "nfc", "emmc";
-        #address-cells = <1>;
-        #size-cells = <0>;
-        interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
-        clocks = <&clkc CLKID_SD_EMMC_C>,
-             <&clkc CLKID_FCLK_DIV2>;
-        clock-names = "core", "device";
-
-        pinctrl-names = "default";
-        pinctrl-0 = <&nand_pins>;
-
-        nand@0 {
-            reg = <0>;
-            #address-cells = <1>;
-            #size-cells = <1>;
-
-            nand-on-flash-bbt;
-        };
-    };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+  - $ref: "nand-controller.yaml"
+
+maintainers:
+  - liang.yang@xxxxxxxxxxx
+
+properties:
+  compatible:
+    enum:
+      - "amlogic,meson-gxl-nfc"
+      - "amlogic,meson-axg-nfc"
+
+  reg:
+    maxItems: 2
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 2
+
+  clock-names:
+    items:
+      - const: core
+      - const: device
+
+patternProperties:
+  "^nand@[0-7]$":
+    type: object
+    properties:
+      reg:
+        minimum: 0
+        maximum: 1
+
+      nand-ecc-mode:
+        const: hw
+
+      nand-ecc-step-size:
+        const: 1024
+
+      nand-ecc-strength:
+        enum: [8, 16, 24, 30, 40, 50, 60]
+        description: |
+          The ECC configurations that can be supported are as follows.
+            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+            meson-axg-nfc 8
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/axg-clkc.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    nand-controller@ffe07800 {
+      compatible = "amlogic,meson-axg-nfc";
+      reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+      reg-names = "nfc", "emmc";
+      interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+      clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
+      clock-names = "core", "device";
+
+      pinctrl-0 = <&nand_pins>;
+      pinctrl-names = "default";
+
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      nand@0 {
+        reg = <0>;
+      };
+    };
+
+...

Thanks,
Neil

.