[PATCH 1/1] LoongArch: Fixed loongarch kernel csr_xxx implicit declaration.

[Yupeng Li]

Loongarch CSR register operation related interface, use the
interface defined  __builtin_loongarch_xxx instead.
Build kernel error messages like:

  CALL    scripts/atomic/check-atomics.sh
  CC      arch/loongarch/kernel/asm-offsets.s
In file included from ./arch/loongarch/include/asm/cpu-info.h:11,
                 from ./arch/loongarch/include/asm/processor.h:13,
                 from ./arch/loongarch/include/asm/thread_info.h:15,
                 from ./include/linux/thread_info.h:60,
                 from ./include/asm-generic/current.h:5,
                 from ./arch/loongarch/include/generated/asm/current.h:1,
                 from ./include/linux/sched.h:12,
                 from arch/loongarch/kernel/asm-offsets.c:8:
./arch/loongarch/include/asm/loongarch.h: In function 'csr_read32':
./arch/loongarch/include/asm/loongarch.h:232:9: error: implicit declaration of function '__csrrd_w'; did you mean '__iocsrrd_w'? [-Werror=implicit-function-declaration]
  return __csrrd_w(reg);
         ^~~~~~~~~
         __iocsrrd_w
./arch/loongarch/include/asm/loongarch.h: In function 'csr_read64':
./arch/loongarch/include/asm/loongarch.h:237:9: error: implicit declaration of function '__csrrd_d'; did you mean '__iocsrrd_d'? [-Werror=implicit-function-declaration]
  return __csrrd_d(reg);
         ^~~~~~~~~
         __iocsrrd_d
./arch/loongarch/include/asm/loongarch.h: In function 'csr_write32':
./arch/loongarch/include/asm/loongarch.h:242:2: error: implicit declaration of function '__csrwr_w'; did you mean '__iocsrwr_w'? [-Werror=implicit-function-declaration]
  __csrwr_w(val, reg);
  ^~~~~~~~~
  __iocsrwr_w
./arch/loongarch/include/asm/loongarch.h: In function 'csr_write64':
./arch/loongarch/include/asm/loongarch.h:247:2: error: implicit declaration of function '__csrwr_d'; did you mean '__iocsrwr_d'? [-Werror=implicit-function-declaration]
  __csrwr_d(val, reg);
  ^~~~~~~~~
  __iocsrwr_d
./arch/loongarch/include/asm/loongarch.h: In function 'csr_xchg32':
./arch/loongarch/include/asm/loongarch.h:252:9: error: implicit declaration of function '__csrxchg_w'; did you mean '__cmpxchg'? [-Werror=implicit-function-declaration]
  return __csrxchg_w(val, mask, reg);
         ^~~~~~~~~~~
         __cmpxchg
./arch/loongarch/include/asm/loongarch.h: In function 'csr_xchg64':
./arch/loongarch/include/asm/loongarch.h:257:9: error: implicit declaration of function '__csrxchg_d'; did you mean '__cmpxchg'? [-Werror=implicit-function-declaration]
  return __csrxchg_d(val, mask, reg);
         ^~~~~~~~~~~
         __cmpxchg
cc1: all warnings being treated as errors
make[1]: *** [scripts/Makefile.build:117：arch/loongarch/kernel/asm-offsets.s] 错误 1
make: *** [Makefile:1205：prepare0] 错误 2

Signed-off-by: Yupeng Li <liyupeng@xxxxxxxxxx>
Signed-off-by: Caicai <caizp2008@xxxxxxx>
---
 arch/loongarch/include/asm/loongarch.h | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index 3ba4f7e87cd2..576ec266d9fc 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -10,7 +10,6 @@
 #include <linux/types.h>
 
 #ifndef __ASSEMBLY__
-#include <larchintrin.h>
 
 /*
  * parse_r var, r - Helper assembler macro for parsing register names.
@@ -58,7 +57,7 @@ __asm__(".macro	parse_r var r\n\t"
 /* CPUCFG */
 static inline u32 read_cpucfg(u32 reg)
 {
-	return __cpucfg(reg);
+	return __builtin_loongarch_cpucfg(reg);
 }
 
 #endif /* !__ASSEMBLY__ */
@@ -229,53 +228,53 @@ static inline u32 read_cpucfg(u32 reg)
 /* CSR */
 static __always_inline u32 csr_read32(u32 reg)
 {
-	return __csrrd_w(reg);
+	return __builtin_loongarch_csrrd(reg);
 }
 
 static __always_inline u64 csr_read64(u32 reg)
 {
-	return __csrrd_d(reg);
+	return __builtin_loongarch_csrrd(reg);
 }
 
 static __always_inline void csr_write32(u32 val, u32 reg)
 {
-	__csrwr_w(val, reg);
+	__builtin_loongarch_csrwr(val, reg);
 }
 
 static __always_inline void csr_write64(u64 val, u32 reg)
 {
-	__csrwr_d(val, reg);
+	__builtin_loongarch_csrwr(val, reg);
 }
 
 static __always_inline u32 csr_xchg32(u32 val, u32 mask, u32 reg)
 {
-	return __csrxchg_w(val, mask, reg);
+	return __builtin_loongarch_csrxchg(val, mask, reg);
 }
 
 static __always_inline u64 csr_xchg64(u64 val, u64 mask, u32 reg)
 {
-	return __csrxchg_d(val, mask, reg);
+	return __builtin_loongarch_csrxchg(val, mask, reg);
 }
 
 /* IOCSR */
 static __always_inline u32 iocsr_read32(u32 reg)
 {
-	return __iocsrrd_w(reg);
+	return __builtin_loongarch_iocsrrd_w(reg);
 }
 
 static __always_inline u64 iocsr_read64(u32 reg)
 {
-	return __iocsrrd_d(reg);
+	return __builtin_loongarch_iocsrrd_d(reg);
 }
 
 static __always_inline void iocsr_write32(u32 val, u32 reg)
 {
-	__iocsrwr_w(val, reg);
+	__builtin_loongarch_iocsrwr_w(val, reg);
 }
 
 static __always_inline void iocsr_write64(u64 val, u32 reg)
 {
-	__iocsrwr_d(val, reg);
+	__builtin_loongarch_iocsrwr_d(val, reg);
 }
 
 #endif /* !__ASSEMBLY__ */
-- 
2.34.1