Re: [PATCH 04/13] x86/cpufeatures: Add LbrExtV2 feature bit

[Peter Zijlstra]

On Mon, Aug 22, 2022 at 06:22:25PM +0530, Sandipan Das wrote:
> AMD LbrExtV2 is similar to Intel LBR. Unlike BRS, LbrExtV2 does not rely on

LbrExtV2 must be the most terrible name ever, please stop using it. Heck
your own code calls it lbr_v2 wherever it can.

So can we please just kill that name entirely?

$ quilt diff --combine - | grep -i lbrext_v2
+       if (x86_pmu.version < 2 || !boot_cpu_has(X86_FEATURE_LBREXT_V2))
+#define X86_FEATURE_LBREXT_V2          ( 3*32+17) /* AMD Last Branch Record Extension Version 2 */
+       { X86_FEATURE_LBREXT_V2,        CPUID_EAX,  1, 0x80000022, 0 },

Is the complete usage of this silly name.

> interrupt holding. The branch records are "frozen" at the time of counter
> overflow.

Yes, I get all that. It is also significantly different from Intel LBR
in all details and shares not a single line of code, so also calling it
LBR is confusing at best.

The MSRs are called AMD_SAMPL_BR, so why not call the thing BRS_V2 ?