[PATCH v2 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings

From: Conor Dooley
Date: Wed Aug 17 2022 - 16:06:11 EST


From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>

The device trees produced automatically for the virt and spike machines
fail dt-validate on several grounds. Some of these need to be fixed in
the linux kernel's dt-bindings, but others are caused by bugs in QEMU.

Patches been sent that fix the QEMU issues [0], but a couple of them
need to be fixed in the kernel's dt-bindings. The first patches add
compatibles for "riscv,{clint,plic}0" which are present in drivers and
the auto generated QEMU dtbs. The final patch should be ignored for all
serious purposes unless you want to wash your eyes out afterwards, but
JIC the versioned extensions ever come up, it's there.

Thanks to Rob Herring for reporting these issues [1],
Conor.

To reproduce the errors:
./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
dt-validate -p /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json qemu.dtb
(The processed schema needs to be generated first)

0 - https://lore.kernel.org/linux-riscv/20220810184612.157317-1-mail@xxxxxxxxxxx/
1 - https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@xxxxxxxxxx/

Changes since v1:
- drop the "legacy systems" bit from the binding descriptions
- convert to a regex for the isa string

Conor Dooley (4):
dt-bindings: timer: sifive,clint: add legacy riscv compatible
dt-bindings: interrupt-controller: sifive,plic: add legacy riscv
compatible
dt-bindings: riscv: add new riscv,isa strings for emulators
dt-bindings: riscv: isa string bonus content

.../sifive,plic-1.0.0.yaml | 5 +++++
.../devicetree/bindings/riscv/cpus.yaml | 9 ++++++---
.../bindings/timer/sifive,clint.yaml | 18 ++++++++++++------
3 files changed, 23 insertions(+), 9 deletions(-)


base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868
--
2.37.1