Re: [PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list

From: Krzysztof Kozlowski
Date: Wed Jul 27 2022 - 04:52:01 EST

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In reply to: Lad Prabhakar: "[PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list"
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On 26/07/2022 20:06, Lad Prabhakar wrote:
> The Renesas RZ/Five microprocessor includes a RISC-V CPU Core (AX45MP
> Single) from Andes. In preparation to add support for RZ/Five SoC add
> the Andes AX45MP core to the list.
>

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>

Best regards,
Krzysztof

Next message: Krzysztof Kozlowski: "Re: [PATCH 1/6] dt-bindings: arm: renesas: Ignore the schema for RISC-V arch"
Previous message: Krzysztof Kozlowski: "Re: [PATCH 2/6] dt-bindings: riscv: Sort the CPU core list alphabetically"
In reply to: Lad Prabhakar: "[PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list"
Next in thread: Lad Prabhakar: "[PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK"
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