[PATCH RFC v1] spi: realtek-rtl: Fix clearing some register bits

From: Martin Blumenstingl
Date: Mon Jul 25 2022 - 15:36:27 EST


The code seemingly tries to clear RTL_SPI_SFCSR_LEN_MASK (before then
setting either RTL_SPI_SFCSR_LEN1 or RTL_SPI_SFCSR_LEN4) and
RTL_SPI_SFCSR_CS. What it actually does is only keeping these bits and
clearing all other bits, even the ones which were just set before. Fix
the operation to clear the bits in the selected mask and keep all other
ones.

Fixes: a8af5cc2ff1e80 ("spi: realtek-rtl: Add support for Realtek RTL838x/RTL839x SPI controllers")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
---
I stumbled across this while reading the driver. This patch is untested
because I don't have any hardware with this controller.


drivers/spi/spi-realtek-rtl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-realtek-rtl.c b/drivers/spi/spi-realtek-rtl.c
index 866b0477dbd7..e5ad0f11996f 100644
--- a/drivers/spi/spi-realtek-rtl.c
+++ b/drivers/spi/spi-realtek-rtl.c
@@ -49,7 +49,7 @@ static void set_size(struct rtspi *rtspi, int size)
u32 value;

value = readl(REG(RTL_SPI_SFCSR));
- value &= RTL_SPI_SFCSR_LEN_MASK;
+ value &= ~RTL_SPI_SFCSR_LEN_MASK;
if (size == 4)
value |= RTL_SPI_SFCSR_LEN4;
else if (size == 1)
@@ -143,7 +143,7 @@ static void init_hw(struct rtspi *rtspi)
/* Permanently disable CS1, since it's never used */
value |= RTL_SPI_SFCSR_CSB1;
/* Select CS0 for use */
- value &= RTL_SPI_SFCSR_CS;
+ value &= ~RTL_SPI_SFCSR_CS;
writel(value, REG(RTL_SPI_SFCSR));
}

--
2.37.1