Re: [PATCH v1 2/3] drm/msm/dp: decoupling dp->id out of dp controller_id at scxxxx_dp_cfg table

From: Kuogee Hsieh
Date: Fri Jun 24 2022 - 19:56:56 EST



On 6/24/2022 4:45 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-06-24 16:30:59)
On 6/24/2022 4:12 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-06-24 15:53:45)
MSM_DP_CONTROLLER_1 need to match to the index = 1 of sc7280_dp_cfg[] <== This is correct

The problem is sc7280_dp_cfg[] have two entries since eDP place at index
of MSM_DP_CONTROLLER_1.

but .num_desc = 1  <== this said only have one entry at sc7280_dp_cfg[]
table. Therefore eDP will never be found at for loop  at
_dpu_kms_initialize_displayport().

Yes, but what else does the MSM_DP_CONTROLLER_1 need to match? Because
the intention of the previous commit was to make it so the order of
sc7280_dp_cfg couldn't be messed up and not match the
MSM_DP_CONTROLLER_1 value that lives in sc7280_intf[].

at  _dpu_kms_initialize_displayport()

- info.h_tile_instance[0] = i; <== assign i to become dp controller id, "i" is index of scxxxx_dp_cfg[]
This what I mean MSM_DP_CONTROLLER_1 need to match to index = 1 of
scxxxx_dp_cfg[].

it it is not match, then MSM_DP_CONTROLLER_1 with match to different INTF.
I thought we matched the INTF instance by searching through
sc7280_intf[] for a matching MSM_DP_CONTROLLER_1 and then returning that
INTF number. See dpu_encoder_get_intf() and the caller.

yes, but the controller_id had been over written by dp->id.

u32 controller_id = disp_info->h_tile_instance[i];


See below code.


for (i = 0; i < disp_info->num_of_h_tiles && !ret; i++) {
/*
* Left-most tile is at index 0, content is controller id
* h_tile_instance_ids[2] = {0, 1}; DSI0 = left, DSI1 = right
* h_tile_instance_ids[2] = {1, 0}; DSI1 = left, DSI0 = right
*/
u32 controller_id = disp_info->h_tile_instance[i]; <== kuogee assign dp->id to controller_id

if (disp_info->num_of_h_tiles > 1) {
if (i == 0)
phys_params.split_role = ENC_ROLE_MASTER;
else
phys_params.split_role = ENC_ROLE_SLAVE;
} else {
phys_params.split_role = ENC_ROLE_SOLO;
}

DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n",
i, controller_id, phys_params.split_role);

phys_params.intf_idx = dpu_encoder_get_intf(dpu_kms->catalog,

intf_type,

controller_id);