Jonathan any chance this is Tegra specific? Our ARCH_BRCMSTB SoCs which use a Brahma-B15 which uses nearly the same ca15 processor functions defined in arch/arm/mm/proc-v7.S reports the following *before* changes:
[ 0.001641] CPU: Testing write buffer coherency: ok
[ 0.001685] CPU0: Spectre v2: using ICIALLU workaround
[ 0.001703] ftrace: allocating 30541 entries in 120 pages
[ 0.044600] CPU0: update cpu_capacity 1024
[ 0.044633] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.044662] Setting up static identity map for 0x200000 - 0x200060
[ 0.047410] brcmstb: biuctrl: MCP: Write pairing already disabled
[ 0.048974] CPU1: update cpu_capacity 1024
[ 0.048978] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.048981] CPU1: Spectre v2: using ICIALLU workaround
[ 0.050234] CPU2: update cpu_capacity 1024
[ 0.050238] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.050241] CPU2: Spectre v2: using ICIALLU workaround
[ 0.051437] CPU3: update cpu_capacity 1024
[ 0.051441] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.051444] CPU3: Spectre v2: using ICIALLU workaround
[ 0.051532] Brought up 4 CPUs
and this *after* merging 4.9.316-rc1:
[ 0.001626] CPU: Testing write buffer coherency: ok
[ 0.001670] CPU0: Spectre v2: using ICIALLU workaround
[ 0.001689] CPU0: Spectre BHB: using loop workaround
[ 0.001705] ftrace: allocating 30542 entries in 120 pages
[ 0.043752] CPU0: update cpu_capacity 1024
[ 0.043784] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.043813] Setting up static identity map for 0x200000 - 0x200060
[ 0.046547] brcmstb: biuctrl: MCP: Write pairing already disabled
[ 0.048121] CPU1: update cpu_capacity 1024
[ 0.048124] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.048129] CPU1: Spectre v2: using ICIALLU workaround
[ 0.048165] CPU1: Spectre BHB: using loop workaround
[ 0.049398] CPU2: update cpu_capacity 1024
[ 0.049402] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.049405] CPU2: Spectre v2: using ICIALLU workaround
[ 0.049440] CPU2: Spectre BHB: using loop workaround
[ 0.050613] CPU3: update cpu_capacity 1024
[ 0.050617] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.050619] CPU3: Spectre v2: using ICIALLU workaround
[ 0.050653] CPU3: Spectre BHB: using loop workaround
[ 0.050722] Brought up 4 CPUs
[ 0.050738] SMP: Total of 4 processors activated (216.00 BogoMIPS).
[ 0.050753] CPU: All CPU(s) started in HYP mode.