Re: [PATCH] perf: RISC-V: Remove non-kernel-doc ** comments

[Randy Dunlap]

On 3/22/22 15:01, Palmer Dabbelt wrote:
> From: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
> 
> This will presumably trip up some tools that try to parse the comments
> as kernel doc when they're not.
> 
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
> Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support")
> Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>

Acked-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>

thanks.

> 
> --
> 
> These recently landed in for-next, but I'm trying to avoid rewriting
> history as there's a lot in flight right now.
> ---
>  drivers/perf/riscv_pmu_sbi.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index a1317a483512..dca3537a8dcc 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -35,7 +35,7 @@ union sbi_pmu_ctr_info {
>  	};
>  };
>  
> -/**
> +/*
>   * RISC-V doesn't have hetergenous harts yet. This need to be part of
>   * per_cpu in case of harts with different pmu counters
>   */
> @@ -477,7 +477,7 @@ static int pmu_sbi_get_ctrinfo(int nctr)
>  
>  static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
>  {
> -	/**
> +	/*
>  	 * No need to check the error because we are disabling all the counters
>  	 * which may include counters that are not enabled yet.
>  	 */
> @@ -494,7 +494,7 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
>  		  cpu_hw_evt->used_hw_ctrs[0], 0, 0, 0, 0);
>  }
>  
> -/**
> +/*
>   * This function starts all the used counters in two step approach.
>   * Any counter that did not overflow can be start in a single step
>   * while the overflowed counters need to be started with updated initialization
> @@ -563,7 +563,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev)
>  	/* Overflow status register should only be read after counter are stopped */
>  	overflow = csr_read(CSR_SSCOUNTOVF);
>  
> -	/**
> +	/*
>  	 * Overflow interrupt pending bit should only be cleared after stopping
>  	 * all the counters to avoid any race condition.
>  	 */

-- 
~Randy