On 2/21/22 09:44, Michael Walle wrote:
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Am 2022-02-18 15:58, schrieb Tudor Ambarus:
Fortunately there are controllers
that can swap back the bytes at runtime, fixing the endiannesses.
Provide
a way for the upper layers to specify the byte order in DTR mode.
Are there any patches for the atmel-quadspi yet? What happens if
not public, but will publish them these days.
the controller doesn't support it? Will there be a software fallback?
no need for a fallback, the controller can ignore op->data.dtr_bswap16 if
it can't swap bytes.