Re: [PATCH 14/29] x86/ibt: Add IBT feature, MSR and #CP handling

[Josh Poimboeuf]

On Fri, Feb 18, 2022 at 05:49:16PM +0100, Peter Zijlstra wrote:
> +DEFINE_IDTENTRY_ERRORCODE(exc_control_protection)
> +{
> +	if (!cpu_feature_enabled(X86_FEATURE_IBT)) {
> +		pr_err("Whaaa?!?!\n");
> +		return;
> +	}

Might want to upgrade that to a proper warning :-)

> +bool ibt_selftest(void)
> +{
> +	ibt_selftest_ok = false;
> +
> +	asm (ANNOTATE_NOENDBR
> +	     "1: lea 2f(%%rip), %%rax\n\t"
> +	     ANNOTATE_RETPOLINE_SAFE
> +	     "   jmp *%%rax\n\t"
> +	     "2: nop\n\t"
> +
> +	     /* unsigned ibt_selftest_ip = 2b */
> +	     ".pushsection .data,\"aw\"\n\t"
> +	     ".align 8\n\t"
> +	     ".type ibt_selftest_ip, @object\n\t"
> +	     ".size ibt_selftest_ip, 8\n\t"
> +	     "ibt_selftest_ip:\n\t"
> +	     ".quad 2b\n\t"
> +	     ".popsection\n\t"
> +
> +	     : : : "rax", "memory");

Can 'ibt_selftest_ip' just be defined in C (with __ro_after_init) and
passed as an output to the asm doing 'mov $2b, %[ibt_selftest_ip]'?

-- 
Josh