[net-next PATCH 1/3] octeontx2-af: Sending tsc value to the userspace

[Rakesh Babu Saladi]

From: Harman Kalra <hkalra@xxxxxxxxxxx>

This patch updates the existing PTP_OP_GET_CLOCK mbox message to
return timestamp counter value, tsc (cntvct_el0 or pmccntr_el0)
along with the PTP HI clock value.

In some debugging scenarios user might need to read the PTP HI
clock value in the fastpath, so as to know how many ticks have
been spent till point from the reception of the packet, as packet
reception tick value is already appended to the packet by CGX.
If directly PTP_OP_GET_CLOCK mbox message is sent every time user
wants to record PTP HI clock value, it will bring down the
performance to a great extent as mbox is a very expensive process.

To handle this PTP HI clock can be derived from timestamp counter
(tsc, which could be running at 100MHz or system freq) using two
parameters freq multiplier (ratio of frequencies of PTP HI clock
and tsc) and clock delta (by how much tsc is lagging from PTP HI
clock). During configuration stage these parameters are calculated
     freq_mult = (freq of PTP HI clock)/(freq of tsc counter)
     clk_delta = (PTP_HI clock value / freq_mult) - (tsc val)
   these PTP_HI val and tsc value are receieved by calling
   PTP_OP_GET_CLOCK. Purpose of returing tsc at the same time
   with PTP_HI value is to avoid mbox propagation delay.

Now whenever user wants to know PTP HI clock, it can be derived
from tsc counter and returned:
     PTP_HI val = (tsc value + clk_delta) * freq_mult

Signed-off-by: Harman Kalra <hkalra@xxxxxxxxxxx>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@xxxxxxxxxxx>
Signed-off-by: Rakesh Babu Saladi <rsaladi2@xxxxxxxxxxx>
---
 .../net/ethernet/marvell/octeontx2/af/mbox.h  |  2 ++
 .../net/ethernet/marvell/octeontx2/af/ptp.c   | 25 ++++++++++++++++---
 2 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 550cb11197bf..2be11062ec33 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -1451,12 +1451,14 @@ struct ptp_req {
 	struct mbox_msghdr hdr;
 	u8 op;
 	s64 scaled_ppm;
+	u8 is_pmu;
 	u64 thresh;
 };

 struct ptp_rsp {
 	struct mbox_msghdr hdr;
 	u64 clk;
+	u64 tsc;
 };

 struct set_vf_perm  {
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/ptp.c b/drivers/net/ethernet/marvell/octeontx2/af/ptp.c
index e682b7bfde64..211c375446f4 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/ptp.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/ptp.c
@@ -114,10 +114,28 @@ static int ptp_adjfine(struct ptp *ptp, long scaled_ppm)
 	return 0;
 }

-static int ptp_get_clock(struct ptp *ptp, u64 *clk)
+static inline u64 get_tsc(bool is_pmu)
+{
+#if defined(CONFIG_ARM64)
+	return is_pmu ? read_sysreg(pmccntr_el0) : read_sysreg(cntvct_el0);
+#else
+	return 0;
+#endif
+}
+
+static int ptp_get_clock(struct ptp *ptp, bool is_pmu, u64 *clk, u64 *tsc)
 {
 	/* Return the current PTP clock */
-	*clk = readq(ptp->reg_base + PTP_CLOCK_HI);
+	u64 end, start;
+	u8 retries = 0;
+
+	do {
+		start = get_tsc(0);
+		*tsc = get_tsc(is_pmu);
+		*clk = readq(ptp->reg_base + PTP_CLOCK_HI);
+		end = get_tsc(0);
+		retries++;
+	} while (((end - start) > 50) && retries < 5);

 	return 0;
 }
@@ -297,7 +315,8 @@ int rvu_mbox_handler_ptp_op(struct rvu *rvu, struct ptp_req *req,
 		err = ptp_adjfine(rvu->ptp, req->scaled_ppm);
 		break;
 	case PTP_OP_GET_CLOCK:
-		err = ptp_get_clock(rvu->ptp, &rsp->clk);
+		err = ptp_get_clock(rvu->ptp, req->is_pmu, &rsp->clk,
+				    &rsp->tsc);
 		break;
 	case PTP_OP_GET_TSTMP:
 		err = ptp_get_tstmp(rvu->ptp, &rsp->clk);
--
2.17.1