Re: [PATCH] KVM: x86/pmu: Fix reserved bits for AMD PerfEvtSeln register

[Like Xu]

On 12/2/2022 4:39 pm, Jim Mattson wrote:
> > -       pmu->reserved_bits = 0xffffffff00200000ull;
> > +       pmu->reserved_bits = 0xfffffff000280000ull;
> Bits 40 and 41 are guest mode and host mode. They cannot be reserved
> if the guest supports nested SVM.

Indeed, we need (some hands) to do more pmu tests on nested SVM.