Re: [PATCH v2] PCI: qcom: Add system PM support

From: Manivannan Sadhasivam
Date: Fri Feb 11 2022 - 04:14:18 EST


On top of Bjorn's review:

On Tue, Feb 01, 2022 at 11:37:56PM +0530, Prasad Malisetty wrote:
> Add suspend_noirq and resume_noirq callbacks to handle
> System suspend and resume in dwc pcie controller driver.
>
> When system suspends, send PME turnoff message to enter
> link into L2 state. Along with powerdown the PHY, disable
> pipe clock, switch gcc_pcie_1_pipe_clk_src to XO if mux is
> supported and disable the pcie clocks, regulators.
>
> When system resumes, PCIe link will be re-established and
> setup rc settings.
>
> Signed-off-by: Prasad Malisetty <quic_pmaliset@xxxxxxxxxxx>
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
>
> ---
> Changes since v1:
> - Removed unnecessary logs and modified log level suggested by Manivannan.
> - Removed platform specific callbacks as PM support is generic.

This is not still generic... Please see below.

> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 97 ++++++++++++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index c19cd506..d1dd6c7 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -73,6 +73,8 @@
>
> #define PCIE20_PARF_Q2A_FLUSH 0x1AC
>
> +#define PCIE20_PARF_PM_STTS 0x24
> +
> #define PCIE20_MISC_CONTROL_1_REG 0x8BC
> #define DBI_RO_WR_EN 1
>
> @@ -1616,6 +1618,100 @@ static int qcom_pcie_probe(struct platform_device *pdev)
> return ret;
> }
>
> +static int qcom_pcie_send_pme_turnoff_msg(struct qcom_pcie *pcie)
> +{
> + int ret = 0;
> + u32 val = 0, poll_val = 0;
> + u64 l23_rdy_poll_timeout = 100000;
> + struct dw_pcie *pci = pcie->pci;
> + struct device *dev = pci->dev;
> +
> + val = readl(pcie->elbi + PCIE20_ELBI_SYS_CTRL);
> + val |= BIT(4);

Define BIT(4)

> + writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
> +
> + ret = readl_poll_timeout((pcie->parf + PCIE20_PARF_PM_STTS), poll_val,
> + (poll_val & BIT(5)), 10000, l23_rdy_poll_timeout);

Define BIT(5)

> + if (!ret)
> + dev_info(dev, "PM_Enter_L23 is received\n");

Maybe print, "Device entered L23_Ready state"? Also this should be dev_dbg().

> + else
> + dev_err(dev, "PM_Enter_L23 is NOT received.PARF_PM_STTS 0x%x\n",

Maybe print, "Device failed to enter L23_Ready state"?

> + readl_relaxed(pcie->parf + PCIE20_PARF_PM_STTS));
> +
> + return ret;
> +}
> +
> +static void qcom_pcie_host_disable(struct qcom_pcie *pcie)
> +{
> + struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
> +

As Bjorn said this would only work for platforms supporting v2.7.0 ops. Please
make it generic.

> + /* Assert the reset of endpoint */
> + qcom_ep_reset_assert(pcie);
> +
> + /* Put PHY into POWER DOWN state */
> + phy_power_off(pcie->phy);
> +
> + writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);

Define "1".

Thanks,
Mani