Re: [PATCH v2] dt-bindings: can: xilinx_can: Convert Xilinx CAN binding to YAML

From: Michal Simek
Date: Thu Feb 10 2022 - 07:21:03 EST




On 2/9/22 23:26, Rob Herring wrote:
On Wed, 09 Feb 2022 23:18:50 +0530, Amit Kumar Mahapatra wrote:
Convert Xilinx CAN binding documentation to YAML.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xxxxxxxxxx>
---
BRANCH: yaml

Changes in v2:
- Added reference to can-controller.yaml
- Added example node for canfd-2.0
---
.../bindings/net/can/xilinx_can.txt | 61 -------
.../bindings/net/can/xilinx_can.yaml | 160 ++++++++++++++++++
2 files changed, 160 insertions(+), 61 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt
create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.yaml


Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1590637


can@ff060000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml

can@ff070000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml


Yes add power-domains as was done for example by this commit for ttc.

Thanks,
Michal

commit 557804a81d256b15952dcd179280ede92a5bfae1
Author: Michal Simek <michal.simek@xxxxxxxxxx>
AuthorDate: Fri Oct 15 10:29:14 2021 +0200
Commit: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
CommitDate: Tue Nov 2 10:03:25 2021 +0100

dt-bindings: timer: cadence_ttc: Add power-domains

Describe optional power-domain property to fix dts_check warnings.
The similar change was done by commit 8c0aa567146b ("dt-bindings: gpio:
fsl-imx-gpio: Add power-domains").

Signed-off-by: Michal Simek <michal.simek@xxxxxxxxxx>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
Link: https://lore.kernel.org/r/cc655a72b20790f6d7408b1aaf81c4bf878aafb4.1634286552.git.michal.simek@xxxxxxxxxx
Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>