[PATCH v2 2/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node

[Srinivasa Rao Mandadapu]

Add LPASS LPI pinctrl node required for Audio functionality on sc7280
based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@xxxxxxxxxxx>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@xxxxxxxxxxx>
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 150 +++++++++++++++++++++++++++++++
 1 file changed, 150 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index c7d6c46..4704a93 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -638,3 +638,153 @@
 		bias-pull-up;
 	};
 };
+&soc {
+	lpass_tlmm: pinctrl@33c0000 {
+		compatible = "qcom,sc7280-lpass-lpi-pinctrl";
+		reg = <0 0x33c0000 0x0 0x20000>,
+			<0 0x3550000 0x0 0x10000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+		#clock-cells = <1>;
+
+		dmic01_active: dmic01-active-pins {
+			clk {
+				pins = "gpio6";
+				function = "dmic1_clk";
+				drive-strength = <8>;
+				output-high;
+			};
+			data {
+				pins = "gpio7";
+				function = "dmic1_data";
+				drive-strength = <8>;
+				input-enable;
+			};
+		};
+
+		dmic01_sleep: dmic01-sleep-pins {
+			clk {
+				pins = "gpio6";
+				function = "dmic1_clk";
+				drive-strength = <2>;
+				bias-disable;
+				output-low;
+			};
+
+			data {
+				pins = "gpio7";
+				function = "dmic1_data";
+				drive-strength = <2>;
+				pull-down;
+				input-enable;
+			};
+		};
+
+		dmic23_active: dmic02-active-pins {
+			clk {
+				pins = "gpio8";
+				function = "dmic2_clk";
+				drive-strength = <8>;
+				output-high;
+			};
+			data {
+				pins = "gpio9";
+				function = "dmic2_data";
+				drive-strength = <8>;
+				input-enable;
+			};
+		};
+
+		dmic23_sleep: dmic02-sleep-pins {
+			clk {
+				pins = "gpio8";
+				function = "dmic2_clk";
+				drive-strength = <2>;
+				bias-disable;
+				output-low;
+			};
+
+			data {
+				pins = "gpio9";
+				function = "dmic2_data";
+				drive-strength = <2>;
+				pull-down;
+				input-enable;
+			};
+		};
+
+		rx_swr_active: rx_swr-active-pins {
+			clk {
+				pins = "gpio3";
+				function = "swr_rx_clk";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-disable;
+			};
+
+			data {
+				pins = "gpio4", "gpio5";
+				function = "swr_rx_data";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		rx_swr_sleep: rx_swr-sleep-pins {
+			clk {
+				pins = "gpio3";
+				function = "swr_rx_clk";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+
+			data {
+				pins = "gpio4", "gpio5";
+				function = "swr_rx_data";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		tx_swr_active: tx_swr-active-pins {
+			clk {
+				pins = "gpio0";
+				function = "swr_tx_clk";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-disable;
+			};
+
+			data {
+				pins = "gpio1", "gpio2", "gpio14";
+				function = "swr_tx_data";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		tx_swr_sleep: tx_swr-sleep-pins {
+			clk {
+				pins = "gpio0";
+				function = "swr_tx_clk";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+
+			data {
+				pins = "gpio1", "gpio2", "gpio14";
+				function = "swr_tx_data";
+				drive-strength = <2>;
+				input-enable;
+				bias-bus-hold;
+			};
+		};
+	};
+};
-- 
2.7.4