Re: [PATCH v2 2/6] mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode

[Tudor.Ambarus]

On 12/23/21 3:06 PM, Tudor.Ambarus@xxxxxxxxxxxxx wrote:
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> 
> On 5/31/21 9:17 PM, Pratyush Yadav wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> The Octal DTR configuration is stored in the CFR5V register. This
>> register is 1 byte wide. But 1 byte long transactions are not allowed in
>> 8D-8D-8D mode. Since the next byte address does not contain any
>> register, it is safe to write any value to it. Write a 0 to it.
>>
>> Signed-off-by: Pratyush Yadav <p.yadav@xxxxxx>
>> ---
>>
>> (no changes since v1)
>>
>>  drivers/mtd/spi-nor/spansion.c | 18 +++++++++++++-----
>>  1 file changed, 13 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
>> index ee82dcd75310..e6bf5c9eee6a 100644
>> --- a/drivers/mtd/spi-nor/spansion.c
>> +++ b/drivers/mtd/spi-nor/spansion.c
>> @@ -65,10 +65,18 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
>>         if (ret)
>>                 return ret;
>>
>> -       if (enable)
>> -               *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
>> -       else
>> -               *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
>> +       if (enable) {
>> +               buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
>> +       } else {
>> +               /*
>> +                * The register is 1-byte wide, but 1-byte transactions are not
>> +                * allowed in 8D-8D-8D mode. Since there is no register at the
>> +                * next location, just initialize the value to 0 and let the
>> +                * transaction go on.
>> +                */
>> +               buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
>> +               buf[1] = 0;
> 
> how about writing 0xff instead?

it doesn't matter, it's a register. Will apply first 3.

> 
>> +       }
>>
>>         op = (struct spi_mem_op)
>>                 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
>> @@ -76,7 +84,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
>>                                            SPINOR_REG_CYPRESS_CFR5V,
>>                                            1),
>>                            SPI_MEM_OP_NO_DUMMY,
>> -                          SPI_MEM_OP_DATA_OUT(1, buf, 1));
>> +                          SPI_MEM_OP_DATA_OUT(enable ? 1 : 2, buf, 1));
>>
>>         if (!enable)
>>                 spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
>> --
>> 2.30.0
>>
> 
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