Re: [PATCH v3] perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX

[Xing Zhengjun]

On 12/23/2021 12:30 AM, Liang, Kan wrote:
> On 11/18/2021 11:02 AM, zhengjun.xing@xxxxxxxxxxxxxxx wrote:
> > From: Zhengjun Xing <zhengjun.xing@xxxxxxxxxxxxxxx>
> >
> > The user recently report a perf issue in the ICX platform, when test by
>
> If you have the user's name, you may want to add a Reported-by tag to 
> give them credit. If you don't have, it doesn't matter either.
Unfortunately, I haven't the exactly user's name.

> > perf event “uncore_imc_x/cas_count_write”,the write bandwidth is always
> > very small (only 0.38MB/s), it is caused by the wrong "umask" for the
> > "cas_count_write" event. When double-checking, find "cas_count_read"
> > also is wrong.
> >
> > The public document for ICX uncore:
> >
> > https://www.intel.com/content/www/us/en/develop/download/3rd-gen-intel-xeon-processor-scalable-uncore-pm.html 
> >
> >
> > On page 142, Table 2-143, defines Unit Masks for CAS_COUNT:
> > RD b00001111
> > WR b00110000
>
> I think we usually want a permanent reference in the change log. The 
> document may be updated later. The page number or the table number may 
> not be accurate anymore.
>
> I guess you may want to give the exact document name and the version 
> number here. So people can still easily locate the information several 
> years later.
> E.g., "3rd Gen Intel® Xeon® Processor Scalable Family, Codename Ice 
> Lake, Uncore Performance Monitoring Reference Manual, Revision 1.00, May 
> 2021"
Thanks, I will update it in the new version patch.

> > So Corrected both "cas_count_read" and "cas_count_write" for ICX.
> >
> > Old settings:
> >   hswep_uncore_imc_events
> >     INTEL_UNCORE_EVENT_DESC(cas_count_read,  "event=0x04,umask=0x03")
> >       INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x0c")
> >
> > New settings:
> >   snr_uncore_imc_events
> >     INTEL_UNCORE_EVENT_DESC(cas_count_read,  "event=0x04,umask=0x0f")
> >     INTEL_UNCORE_EVENT_DESC(cas_count_write, "event=0x04,umask=0x30"),
> >
> > Fixes: 2b3b76b5ec67 ("perf/x86/intel/uncore: Add Ice Lake server 
> > uncore support")
> > Reviewed-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
>
> Other than the above comments, the patch looks good to me.
>
> Reviewed-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
>
>
> Thanks,
> Kan
>
> > Signed-off-by: Zhengjun Xing <zhengjun.xing@xxxxxxxxxxxxxxx>
> > Cc: stable@xxxxxxxxxxxxxxx
> > ---
> > Change log:
> >
> >    v3:
> >      * Add change log
> >
> >    v2:
> >      * Add stable tag
> >
> >   arch/x86/events/intel/uncore_snbep.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/events/intel/uncore_snbep.c 
> > b/arch/x86/events/intel/uncore_snbep.c
> > index 5ddc0f30db6f..a6fd8eb410a9 100644
> > --- a/arch/x86/events/intel/uncore_snbep.c
> > +++ b/arch/x86/events/intel/uncore_snbep.c
> > @@ -5468,7 +5468,7 @@ static struct intel_uncore_type icx_uncore_imc = {
> >       .fixed_ctr_bits    = 48,
> >       .fixed_ctr    = SNR_IMC_MMIO_PMON_FIXED_CTR,
> >       .fixed_ctl    = SNR_IMC_MMIO_PMON_FIXED_CTL,
> > -    .event_descs    = hswep_uncore_imc_events,
> > +    .event_descs    = snr_uncore_imc_events,
> >       .perf_ctr    = SNR_IMC_MMIO_PMON_CTR0,
> >       .event_ctl    = SNR_IMC_MMIO_PMON_CTL0,
> >       .event_mask    = SNBEP_PMON_RAW_EVENT_MASK,

--
Zhengjun Xing