Re: [PATCH v2 7/7] arm64: dts: exynos: Add initial E850-96 board support

From: Sam Protsenko
Date: Thu Dec 16 2021 - 20:39:40 EST

On Fri, 17 Dec 2021 at 03:30, Sam Protsenko <semen.protsenko@xxxxxxxxxx> wrote:
>
> E850-96 is a 96boards development board manufactured by WinLink. It
> incorporates Samsung Exynos850 SoC, and is compatible with 96boards
> mezzanine boards [1], as it follows 96boards standards.
>
> This patch adds minimal support for E850-96 board. Next features are
> enabled in board dts file and verified with minimal BusyBox rootfs:
>
> * User buttons
> * LEDs
> * Serial console
> * Watchdog timers
> * RTC
> * eMMC
>
> [1] https://www.96boards.org/products/mezzanine/
>
> Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> ---
> Changes in v2:
> - Removed board_id and board_rev properties
> - Removed BOARD_ID and BOARD_REV constants
> - Put dtb in alphabetical order in Makefile
> - Added "color" and "function" properties to LED nodes
> - Sorted all phandle overrides by phandle name
> - Removed 'broken-cd' property in eMMC node
> - Added memory node
>
> arch/arm64/boot/dts/exynos/Makefile | 1 +
> .../boot/dts/exynos/exynos850-e850-96.dts | 175 ++++++++++++++++++
> 2 files changed, 176 insertions(+)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos850-e850-96.dts
>
> diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
> index b41e86df0a84..be9df8e85c59 100644
> --- a/arch/arm64/boot/dts/exynos/Makefile
> +++ b/arch/arm64/boot/dts/exynos/Makefile
> @@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
> exynos5433-tm2.dtb \
> exynos5433-tm2e.dtb \
> exynos7-espresso.dtb \
> + exynos850-e850-96.dtb \
> exynosautov9-sadk.dtb
> diff --git a/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts
> new file mode 100644
> index 000000000000..952a47c417d4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts
> @@ -0,0 +1,175 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * WinLink E850-96 board device tree source
> + *
> + * Copyright (C) 2018 Samsung Electronics Co., Ltd.
> + * Copyright (C) 2021 Linaro Ltd.
> + *
> + * Device tree source file for WinLink's E850-96 board which is based on
> + * Samsung Exynos850 SoC.
> + */
> +
> +/dts-v1/;
> +
> +#include "exynos850.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> + model = "WinLink E850-96 board";
> + compatible = "winlink,e850-96", "samsung,exynos850";
> +
> + chosen {
> + stdout-path = &serial_0;
> + };
> +
> + /*
> + * 4 GiB eMCP:
> + * - 2 GiB at 0x80000000
> + * - 2 GiB at 0x880000000
> + *
> + * 0xbab00000..0xbfffffff: secure memory (85 MiB).
> + */
> + memory@80000000 {
> + device_type = "memory";
> + reg = <0x0 0x80000000 0x3ab00000>,
> + <0x0 0xc0000000 0x40000000>,
> + <0x8 0x80000000 0x80000000>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&key_voldown_pins &key_volup_pins>;
> +
> + volume-down-key {
> + label = "Volume Down";
> + linux,code = <KEY_VOLUMEDOWN>;
> + gpios = <&gpa1 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + volume-up-key {
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + gpios = <&gpa0 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + /* HEART_BEAT_LED */
> + user_led1: led-1 {
> + label = "yellow:user1";
> + gpios = <&gpg2 2 GPIO_ACTIVE_HIGH>;
> + color = <LED_COLOR_ID_YELLOW>;
> + function = LED_FUNCTION_HEARTBEAT;
> + linux,default-trigger = "heartbeat";
> + };
> +
> + /* eMMC_LED */
> + user_led2: led-2 {
> + label = "yellow:user2";
> + gpios = <&gpg2 3 GPIO_ACTIVE_HIGH>;
> + color = <LED_COLOR_ID_YELLOW>;
> + linux,default-trigger = "mmc0";
> + };
> +
> + /* SD_LED */
> + user_led3: led-3 {
> + label = "white:user3";
> + gpios = <&gpg2 4 GPIO_ACTIVE_HIGH>;
> + color = <LED_COLOR_ID_WHITE>;
> + function = LED_FUNCTION_SD;
> + linux,default-trigger = "mmc2";
> + };
> +
> + /* WIFI_LED */
> + wlan_active_led: led-4 {
> + label = "yellow:wlan";
> + gpios = <&gpg2 6 GPIO_ACTIVE_HIGH>;
> + color = <LED_COLOR_ID_YELLOW>;
> + function = LED_FUNCTION_WLAN;
> + linux,default-trigger = "phy0tx";
> + default-state = "off";
> + };
> +
> + /* BLUETOOTH_LED */
> + bt_active_led: led-5 {
> + label = "blue:bt";
> + gpios = <&gpg2 7 GPIO_ACTIVE_HIGH>;
> + color = <LED_COLOR_ID_BLUE>;
> + function = LED_FUNCTION_BLUETOOTH;
> + linux,default-trigger = "hci0rx";
> + default-state = "off";
> + };
> + };
> +};
> +
> +&mmc_0 {
> + status = "okay";
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + cap-mmc-highspeed;
> + non-removable;
> + mmc-hs400-enhanced-strobe;
> + card-detect-delay = <200>;
> + clock-frequency = <800000000>;
> + bus-width = <8>;
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + samsung,dw-mshc-ddr-timing = <2 4>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins
> + &sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>;
> +};
> +
> +&oscclk {
> + clock-frequency = <26000000>;
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&rtcclk {
> + clock-frequency = <32768>;
> +};
> +
> +&serial_0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
> +};
> +
> +&usi_uart {
> + samsung,clkreq-on; /* needed for UART mode */
> + status = "okay";
> +};
> +
> +&watchdog_cl0 {
> + status = "okay";
> +};
> +
> +&watchdog_cl1 {
> + status = "okay";
> +};
> +
> +&pinctrl_alive {

Forgot to order pinctrl node. Will send v3 soon, sorry for the noise.

> + key_voldown_pins: key-voldown-pins {
> + samsung,pins = "gpa1-0";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
> + };
> +
> + key_volup_pins: key-volup-pins {
> + samsung,pins = "gpa0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
> + };
> +};
> --
> 2.30.2
>