[ardb:for-kernelci 1/1] arch/arm/boot/compressed/head.S:315:3: error: invalid instruction, any one of the following would fix this:

From: kernel test robot
Date: Thu Dec 09 2021 - 19:01:11 EST


tree: git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git for-kernelci
head: 3d803745c0cdcca58579eb2654530bf4be3bef72
commit: 3d803745c0cdcca58579eb2654530bf4be3bef72 [1/1] ARM: set textoffset to 4 MiB unconditionally
config: arm-randconfig-r034-20211207 (https://download.01.org/0day-ci/archive/20211210/202112100747.znK7leLP-lkp@xxxxxxxxx/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 097a1cb1d5ebb3a0ec4bcaed8ba3ff6a8e33c00a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/commit/?id=3d803745c0cdcca58579eb2654530bf4be3bef72
git remote add ardb git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git
git fetch --no-tags ardb for-kernelci
git checkout 3d803745c0cdcca58579eb2654530bf4be3bef72
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

>> arch/arm/boot/compressed/head.S:315:3: error: invalid instruction, any one of the following would fix this:
add r4, r0, #0x00408000
^
arch/arm/boot/compressed/head.S:315:16: note: invalid operand for instruction
add r4, r0, #0x00408000
^
arch/arm/boot/compressed/head.S:315:16: note: operand must be a register in range [r0, r15]
add r4, r0, #0x00408000
^
arch/arm/boot/compressed/head.S:315:3: note: instruction requires: thumb2
add r4, r0, #0x00408000
^
arch/arm/boot/compressed/head.S:413:3: error: invalid instruction, any one of the following would fix this:
sub r0, r4, #0x00408000
^
arch/arm/boot/compressed/head.S:413:16: note: invalid operand for instruction
sub r0, r4, #0x00408000
^
arch/arm/boot/compressed/head.S:413:16: note: operand must be a register in range [r0, r15]
sub r0, r4, #0x00408000
^
arch/arm/boot/compressed/head.S:413:3: note: instruction requires: thumb2
sub r0, r4, #0x00408000
^


vim +315 arch/arm/boot/compressed/head.S

0673cb38951215 Geert Uytterhoeven 2021-01-04 300
0673cb38951215 Geert Uytterhoeven 2021-01-04 301 /*
0673cb38951215 Geert Uytterhoeven 2021-01-04 302 * Make sure we have some stack before calling C code.
0673cb38951215 Geert Uytterhoeven 2021-01-04 303 * No GOT fixup has occurred yet, but none of the code we're
0673cb38951215 Geert Uytterhoeven 2021-01-04 304 * about to call uses any global variables.
0673cb38951215 Geert Uytterhoeven 2021-01-04 305 */
0673cb38951215 Geert Uytterhoeven 2021-01-04 306 ldr sp, [r1] @ get stack location
0673cb38951215 Geert Uytterhoeven 2021-01-04 307 add sp, sp, r1 @ apply relocation
0673cb38951215 Geert Uytterhoeven 2021-01-04 308
0673cb38951215 Geert Uytterhoeven 2021-01-04 309 /* Validate calculated start against passed DTB */
0673cb38951215 Geert Uytterhoeven 2021-01-04 310 mov r1, r8
0673cb38951215 Geert Uytterhoeven 2021-01-04 311 bl fdt_check_mem_start
0673cb38951215 Geert Uytterhoeven 2021-01-04 312 1:
0673cb38951215 Geert Uytterhoeven 2021-01-04 313 #endif /* CONFIG_USE_OF */
0a6a78b8b3c1c1 Russell King 2015-03-26 314 /* Determine final kernel image address. */
0673cb38951215 Geert Uytterhoeven 2021-01-04 @315 add r4, r0, #TEXT_OFFSET
e69edc7939abda Eric Miao 2010-07-05 316 #else
9e84ed63dc71e1 Russell King 2010-09-09 317 ldr r4, =zreladdr
e69edc7939abda Eric Miao 2010-07-05 318 #endif
^1da177e4c3f41 Linus Torvalds 2005-04-16 319
2874865c1271cc Nicolas Pitre 2013-06-06 320 /*
2874865c1271cc Nicolas Pitre 2013-06-06 321 * Set up a page table only if it won't overwrite ourself.
7d57909bf69f21 Masahiro Yamada 2015-01-20 322 * That means r4 < pc || r4 - 16k page directory > &_end.
2874865c1271cc Nicolas Pitre 2013-06-06 323 * Given that r4 > &_end is most unfrequent, we add a rough
2874865c1271cc Nicolas Pitre 2013-06-06 324 * additional 1MB of room for a possible appended DTB.
2874865c1271cc Nicolas Pitre 2013-06-06 325 */
2874865c1271cc Nicolas Pitre 2013-06-06 326 mov r0, pc
2874865c1271cc Nicolas Pitre 2013-06-06 327 cmp r0, r4
691cbe5ba5f77f Ard Biesheuvel 2020-04-13 328 ldrcc r0, .Lheadroom
2874865c1271cc Nicolas Pitre 2013-06-06 329 addcc r0, r0, pc
2874865c1271cc Nicolas Pitre 2013-06-06 330 cmpcc r4, r0
2874865c1271cc Nicolas Pitre 2013-06-06 331 orrcc r4, r4, #1 @ remember we skipped cache_on
2874865c1271cc Nicolas Pitre 2013-06-06 332 blcs cache_on
6d7d0ae5157494 Nicolas Pitre 2011-02-21 333

:::::: The code at line 315 was first introduced by commit
:::::: 0673cb38951215060d7993b43ad3c45cd413c2c3 ARM: 9045/1: uncompress: Validate start of physical memory against passed DTB

:::::: TO: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
:::::: CC: Russell King <rmk+kernel@xxxxxxxxxxxxxxx>

---
0-DAY CI Kernel Test Service, Intel Corporation
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