Re: [PATCH v1 4/4] PCI: brcmstb: Augment driver for MIPs SOCs

From: Florian Fainelli
Date: Thu Dec 09 2021 - 16:32:49 EST


On 12/9/21 12:47 PM, Jim Quinlan wrote:
> The current brcmstb driver works for Arm and Arm64. A few things are
> modified here for us to support MIPs as well.
>
> o There are four outbound range register groups and each directs a window
> of up to 128MB. Even though there are four 128MB DT "ranges" in the
> bmips PCIe DT node, these ranges are contiguous and are collapsed into
> a single range by the OF range parser. Now the driver assumes a single
> range -- for MIPs only -- and splits it back into 128MB sizes.
>
> o For bcm7425, the config space accesses must be 32-bit reads or
> writes. In addition, the 4k config space register array is missing
> and not used.
>
> o The registers for the upper 32-bits of the outbound window address do
> not exist.
>
> o Burst size must be set to 256 (this refers to an internal bus).
>
> Signed-off-by: Jim Quinlan <jim2101024@xxxxxxxxx>

Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
--
Florian