Re: [PATCH RESEND v5 4/5] interconnect: qcom: Add MSM8996 interconnect provider driver

[Georgi Djakov]

Hi Yassine,

On 21.10.21 16:25, Yassine Oudjana wrote:
> Add a driver for the MSM8996 NoCs. This chip is similar to SDM660 where
> some busses are controlled by RPM, while others directly by the AP with
> writes to QoS registers
Thank you for working on this!

> Signed-off-by: Yassine Oudjana <y.oudjana@xxxxxxxxxxxxxx>
> ---
> Changes since v4:
>   - Rebase on Dmitry's icc-rpm patches.
>   - Clean up qcom_icc_node structs by removing unused properties, moving links to external
>     arrays and using the same arrays for multiple nodes where possible.
>   - Add support for Aggregate 0 NoC (a0noc).
> Changes since v3:
>   - Expand DEFINE_QNODE macros in msm8996.c.
>   - Commonize probe function.
>   - Code style fixes.
>
>   drivers/interconnect/qcom/Kconfig   |    9 +
>   drivers/interconnect/qcom/Makefile  |    2 +
>   drivers/interconnect/qcom/msm8996.c | 2113 +++++++++++++++++++++++++++
>   drivers/interconnect/qcom/msm8996.h |  149 ++
>   4 files changed, 2273 insertions(+)
>   create mode 100644 drivers/interconnect/qcom/msm8996.c
>   create mode 100644 drivers/interconnect/qcom/msm8996.h
[..]
> +
> +static struct qcom_icc_node mas_ufs = {
> +	.name = "mas_ufs",
> +	.id = MSM8996_MASTER_UFS,
> +	.buswidth = 8,
> +	.mas_rpm_id = 68,
> +	.slv_rpm_id = -1,
> +	.qos.ap_owned = true,
> +	.qos.qos_mode = NOC_QOS_MODE_FIXED,
> +	.qos.areq_prio = 1,
> +	.qos.prio_level = 1,
> +	.qos.qos_port = 2,
> +	.num_links = 1,

This line should be removed, as we use ARRAY_SIZE below.

> +	.num_links = ARRAY_SIZE(mas_a2noc_common_links),
> +	.links = mas_a2noc_common_links
> +};
> +
> +static const u16 mas_apps_proc_links[] = {
> +	MSM8996_SLAVE_BIMC_SNOC_1,
> +	MSM8996_SLAVE_EBI_CH0,
> +	MSM8996_SLAVE_BIMC_SNOC_0
> +};
> +
[..]
> +
> +static struct qcom_icc_node mas_snoc_cnoc = {
> +	.name = "mas_snoc_cnoc",
> +	.id = MSM8996_MASTER_SNOC_CNOC,
> +	.buswidth = 8,
> +	.mas_rpm_id = 52,
> +	.slv_rpm_id = -1,
> +	.num_links = 37,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_snoc_cnoc_links),
> +	.links = mas_snoc_cnoc_links
> +};
> +
[..]
> +static struct qcom_icc_node mas_sdcc_2 = {
> +	.name = "mas_sdcc_2",
> +	.id = MSM8996_MASTER_SDCC_2,
> +	.buswidth = 8,
> +	.mas_rpm_id = 35,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
> +static struct qcom_icc_node mas_sdcc_4 = {
> +	.name = "mas_sdcc_4",
> +	.id = MSM8996_MASTER_SDCC_4,
> +	.buswidth = 8,
> +	.mas_rpm_id = 36,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
> +static struct qcom_icc_node mas_usb_hs = {
> +	.name = "mas_usb_hs",
> +	.id = MSM8996_MASTER_USB_HS,
> +	.buswidth = 8,
> +	.mas_rpm_id = 42,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
> +static struct qcom_icc_node mas_blsp_1 = {
> +	.name = "mas_blsp_1",
> +	.id = MSM8996_MASTER_BLSP_1,
> +	.buswidth = 4,
> +	.mas_rpm_id = 41,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
> +static struct qcom_icc_node mas_blsp_2 = {
> +	.name = "mas_blsp_2",
> +	.id = MSM8996_MASTER_BLSP_2,
> +	.buswidth = 4,
> +	.mas_rpm_id = 39,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
> +static struct qcom_icc_node mas_tsif = {
> +	.name = "mas_tsif",
> +	.id = MSM8996_MASTER_TSIF,
> +	.buswidth = 4,
> +	.mas_rpm_id = 37,
> +	.slv_rpm_id = -1,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(mas_pnoc_a1noc_common_links),
> +	.links = mas_pnoc_a1noc_common_links
> +};
> +
[..]
> +static struct qcom_icc_node slv_a2noc_snoc = {
> +	.name = "slv_a2noc_snoc",
> +	.id = MSM8996_SLAVE_A2NOC_SNOC,
> +	.buswidth = 8,
> +	.mas_rpm_id = -1,
> +	.slv_rpm_id = 143,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(slv_a2noc_snoc_links),
> +	.links = slv_a2noc_snoc_links
> +};
> +
[..]
> +
> +static const u16 slv_snoc_bimc_links[] = {
> +	MSM8996_MASTER_SNOC_BIMC
> +};
> +
> +static struct qcom_icc_node slv_snoc_bimc = {
> +	.name = "slv_snoc_bimc",
> +	.id = MSM8996_SLAVE_SNOC_BIMC,
> +	.buswidth = 32,
> +	.mas_rpm_id = -1,
> +	.slv_rpm_id = 24,
> +	.num_links = 1,

Ditto.

> +	.num_links = ARRAY_SIZE(slv_snoc_bimc_links),
> +	.links = slv_snoc_bimc_links
> +};
> +
[..]

I have fixed the above issue and applied patches 1-4.

Thanks,
Georgi