[RFC][PATCH 07/22] x86,extable: Extend extable functionality

From: Peter Zijlstra
Date: Thu Nov 04 2021 - 13:01:41 EST

In order to remove further .fixup usage, extend the extable
infrastructure to take additional information from the extable entry
sites.

Specifically add _ASM_EXTABLE_TYPE_REG() and EX_TYPE_IMM_REG that
extend the existing _ASM_EXTABLE_TYPE() by taking an additional
register argument and encoding that and an s16 immediate into the
existing s32 type field. This limits the actual types to the first
byte, 255 seem plenty.

Also add a few flags into the type word, specifically CLR_AX and
CLR_DX which clear the return and extended return register.

Notes:
- due to the % in our register names it's hard to make it more
generally usable as arm64 did.
- the s16 is far larger than used in these patches, future extentions
can easily shrink this to get more bits.
- without the bitfield fix this will not compile, because: 0xFF > -1
and we can't even extract the TYPE field.

Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
---
arch/x86/include/asm/asm.h | 27 +++++++++++++
arch/x86/include/asm/extable_fixup_types.h | 14 ++++++
arch/x86/mm/extable.c | 59 +++++++++++++++++++++++++++--
3 files changed, 96 insertions(+), 4 deletions(-)

--- a/arch/x86/include/asm/asm.h
+++ b/arch/x86/include/asm/asm.h
@@ -152,6 +152,25 @@

#else /* ! __ASSEMBLY__ */

+asm(
+" .macro extable_type_reg type:req reg:req\n"
+" .set regnr, 0\n"
+" .irp rs,rax,rcx,rdx,rbx,rsp,rbp,rsi,rdi,r8,r9,r10,r11,r12,r13,r14,r15\n"
+" .ifc \\reg, %\\rs\n"
+" .long \\type + (regnr << 8)\n"
+" .endif\n"
+" .set regnr, regnr+1\n"
+" .endr\n"
+" .set regnr, 0\n"
+" .irp rs,eax,ecx,edx,ebx,esp,ebp,esi,edi,r8d,r9d,r10d,r11d,r12d,r13d,r14d,r15d\n"
+" .ifc \\reg, %\\rs\n"
+" .long \\type + (regnr << 8)\n"
+" .endif\n"
+" .set regnr, regnr+1\n"
+" .endr\n"
+" .endm\n"
+);
+
# define _ASM_EXTABLE_TYPE(from, to, type) \
" .pushsection \"__ex_table\",\"a\"\n" \
" .balign 4\n" \
@@ -160,6 +179,14 @@
" .long " __stringify(type) " \n" \
" .popsection\n"

+# define _ASM_EXTABLE_TYPE_REG(from, to, type, reg) \
+ " .pushsection \"__ex_table\",\"a\"\n" \
+ " .balign 4\n" \
+ " .long (" #from ") - .\n" \
+ " .long (" #to ") - .\n" \
+ "extable_type_reg reg=" __stringify(reg) ", type=" __stringify(type) " \n"\
+ " .popsection\n"
+
/* For C file, we already have NOKPROBE_SYMBOL macro */

/*
--- a/arch/x86/include/asm/extable_fixup_types.h
+++ b/arch/x86/include/asm/extable_fixup_types.h
@@ -2,6 +2,19 @@
#ifndef _ASM_X86_EXTABLE_FIXUP_TYPES_H
#define _ASM_X86_EXTABLE_FIXUP_TYPES_H

+#define EX_TYPE_REG_SHIFT 8
+#define EX_TYPE_FLAG_SHIFT 12
+#define EX_TYPE_IMM_SHIFT 16
+
+#define EX_TYPE_FLAG(flag) ((flag) << EX_TYPE_FLAG_SHIFT)
+#define EX_TYPE_IMM(imm) ((imm) << EX_TYPE_IMM_SHIFT)
+
+/* flags */
+#define EX_FLAG_CLR_AX EX_TYPE_FLAG(1)
+#define EX_FLAG_CLR_DX EX_TYPE_FLAG(2)
+#define EX_FLAG_CLR_AX_DX EX_TYPE_FLAG(3)
+
+/* types */
#define EX_TYPE_NONE 0
#define EX_TYPE_DEFAULT 1
#define EX_TYPE_FAULT 2
@@ -20,5 +33,6 @@
#define EX_TYPE_FAULT_MCE_SAFE 13

#define EX_TYPE_POP_SEG 14
+#define EX_TYPE_IMM_REG 15 /* reg := (long)imm */

#endif
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -2,6 +2,7 @@
#include <linux/extable.h>
#include <linux/uaccess.h>
#include <linux/sched/debug.h>
+#include <linux/bitfield.h>
#include <xen/xen.h>

#include <asm/fpu/api.h>
@@ -9,16 +10,47 @@
#include <asm/traps.h>
#include <asm/kdebug.h>

+static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr)
+{
+ /* because having pt_regs in machine order was too much to ask */
+ switch (nr) {
+ case 0: return &regs->ax;
+ case 1: return &regs->cx;
+ case 2: return &regs->dx;
+ case 3: return &regs->bx;
+ case 4: return &regs->sp;
+ case 5: return &regs->bp;
+ case 6: return &regs->si;
+ case 7: return &regs->di;
+#ifdef CONFIG_X86_64
+ case 8: return &regs->r8;
+ case 9: return &regs->r9;
+ case 10: return &regs->r10;
+ case 11: return &regs->r11;
+ case 12: return &regs->r12;
+ case 13: return &regs->r13;
+ case 14: return &regs->r14;
+ case 15: return &regs->r15;
+#endif
+ default: return NULL;
+ }
+}
+
static inline unsigned long
ex_fixup_addr(const struct exception_table_entry *x)
{
return (unsigned long)&x->fixup + x->fixup;
}

-static bool ex_handler_default(const struct exception_table_entry *fixup,
+static bool ex_handler_default(const struct exception_table_entry *e,
struct pt_regs *regs)
{
- regs->ip = ex_fixup_addr(fixup);
+ if (e->type & EX_FLAG_CLR_AX)
+ regs->ax = 0;
+ if (e->type & EX_FLAG_CLR_DX)
+ regs->dx = 0;
+
+ regs->ip = ex_fixup_addr(e);
return true;
}

@@ -106,17 +138,30 @@ static bool ex_handler_pop_seg(const str
return ex_handler_default(fixup, regs);
}

+static bool ex_handler_imm_reg(const struct exception_table_entry *fixup,
+ struct pt_regs *regs, int reg, int imm)
+{
+ *pt_regs_nr(regs, reg) = (long)imm;
+ return ex_handler_default(fixup, regs);
+}
+
+#define EX_TYPE_MASK 0x000000FF
+#define EX_REG_MASK 0x00000F00
+#define EX_FLAG_MASK 0x0000F000
+#define EX_IMM_MASK 0xFFFF0000
+
int ex_get_fixup_type(unsigned long ip)
{
const struct exception_table_entry *e = search_exception_tables(ip);

- return e ? e->type : EX_TYPE_NONE;
+ return e ? FIELD_GET(EX_TYPE_MASK, e->type) : EX_TYPE_NONE;
}

int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
unsigned long fault_addr)
{
const struct exception_table_entry *e;
+ int type, reg, imm;

#ifdef CONFIG_PNPBIOS
if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
@@ -136,7 +181,11 @@ int fixup_exception(struct pt_regs *regs
if (!e)
return 0;

- switch (e->type) {
+ type = FIELD_GET(EX_TYPE_MASK, e->type);
+ reg = FIELD_GET(EX_REG_MASK, e->type);
+ imm = FIELD_GET(EX_IMM_MASK, e->type);
+
+ switch (type) {
case EX_TYPE_DEFAULT:
case EX_TYPE_DEFAULT_MCE_SAFE:
return ex_handler_default(e, regs);
@@ -165,6 +214,8 @@ int fixup_exception(struct pt_regs *regs
break;
case EX_TYPE_POP_SEG:
return ex_handler_pop_seg(e, regs);
+ case EX_TYPE_IMM_REG:
+ return ex_handler_imm_reg(e, regs, reg, imm);
}
BUG();
}