Re: [PATCH] riscv: cacheinfo: fix typo of homogenous

From: Randy Dunlap
Date: Sat Oct 23 2021 - 16:36:51 EST


On 10/23/21 1:30 PM, Palmer Dabbelt wrote:
On Fri, 08 Oct 2021 13:56:25 PDT (-0700), georgedanielmangum@xxxxxxxxx wrote:
Updates 'homonogenous' to 'homogenous' in comment.

I don't really know spelling that well, but checkpatch says

   WARNING: 'homogenous' may be misspelled - perhaps 'homogeneous'?

when applying this.  It looks like they're both words, but "homogeneous" is the right one?


Internet search to grammar.com says:

To summarise, Earlier, homogenous was used as a scientific term, mainly in biology, but now it is almost obsolete, being replaced by homologous. Whereas, homogeneous is a common word, very much in use and means having similar or comparable characteristics.

Several web sites agree that homogeneous is currently preferable.


Signed-off-by: hasheddan <georgedanielmangum@xxxxxxxxx>
---
 arch/riscv/kernel/cacheinfo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 90deabfe63ea..ff98546b1152 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -29,7 +29,7 @@ static struct cacheinfo *get_cacheinfo(u32 level, enum cache_type type)
     /*
      * Using raw_smp_processor_id() elides a preemptability check, but this
      * is really indicative of a larger problem: the cacheinfo UABI assumes
-     * that cores have a homonogenous view of the cache hierarchy.  That
+     * that cores have a homogenous view of the cache hierarchy.  That
      * happens to be the case for the current set of RISC-V systems, but
      * likely won't be true in general.  Since there's no way to provide
      * correct information for these systems via the current UABI we're


--
~Randy