Re: [PATCH v2 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
From: Andy Shevchenko
Date: Fri Oct 22 2021 - 08:56:12 EST
On Thu, Oct 21, 2021 at 8:43 PM Emil Renner Berthing <kernel@xxxxxxxx> wrote:
>
> Add a driver for the StarFive JH7100 reset controller.
...
> +config RESET_STARFIVE_JH7100
> + bool "StarFive JH7100 Reset Driver"
> + depends on SOC_STARFIVE || COMPILE_TEST
> + depends on OF
No evidence of this dependency. Why to limit test coverage?
> + default SOC_STARFIVE
...
> +/*
> + * Reset driver for the StarFive JH7100 SoC
> + *
> + * Copyright (C) 2021 Emil Renner Berthing <kernel@xxxxxxxx>
> + *
Redundant empty line.
> + */
...
> +#include <linux/of_device.h>
No evidence of any usage of this header. Perhaps you meant mod_devicetable.h?
...
> +static const u32 jh7100_reset_asserted[4] = {
> + BIT(JH7100_RST_U74 % 32) |
> + BIT(JH7100_RST_VP6_DRESET % 32) |
> + BIT(JH7100_RST_VP6_BRESET % 32),
It's hard to notice that this is only one entry. See also below.
> + BIT(JH7100_RST_HIFI4_DRESET % 32) |
> + BIT(JH7100_RST_HIFI4_BRESET % 32),
> +
> + BIT(JH7100_RST_E24 % 32)
+ Comma.
> +};
Why all these ugly % 32 against constants?
...
> + if (!assert)
> + done ^= mask;
Can you convert this to simple
if (assert)
ret = readl_...
else
ret = readl_...
below?
> + spin_lock_irqsave(&data->lock, flags);
> +
> + value = readl(reg_assert);
> + if (assert)
> + value |= mask;
> + else
> + value &= ~mask;
> + writel(value, reg_assert);
> + /* if the associated clock is gated, deasserting might otherwise hang forever */
> + ret = readl_poll_timeout(reg_status, value, (value & mask) == done, 0, 1000);
You run delays under spin lock. You need to use _atomic variant.
> + spin_unlock_irqrestore(&data->lock, flags);
...
> + u32 value = (readl(reg_status) ^ jh7100_reset_asserted[offset]) & mask;
> + dev_dbg(rcdev->dev, "status(%lu) = %d\n", id, !value);
> + return !value;
Dup of ! operator. Can it be value = !(...); above?
--
With Best Regards,
Andy Shevchenko