Re: [RESEND PATCH 1/3] Fix filter_tid mask for CHA events on Skylake Server

[Peter Zijlstra]

On Wed, Oct 20, 2021 at 02:00:26PM +0300, alexander.antonov@xxxxxxxxxxxxxxx wrote:
> From: Alexander Antonov <alexander.antonov@xxxxxxxxxxxxxxx>
> 
> According Uncore Reference Manual: any of the CHA events may be filtered
> by Thread/Core-ID by using tid modifier in CHA Filter 0 Register.
> Update skx_cha_hw_config() to follow Uncore Guide.
> 
> Fixes: cd34cd97b7b4 ("perf/x86/intel/uncore: Add Skylake server uncore support")
> Reviewed-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> Signed-off-by: Alexander Antonov <alexander.antonov@xxxxxxxxxxxxxxx>
> ---
>  arch/x86/events/intel/uncore_snbep.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
> index 5ddc0f30db6f..9cc65a4194ce 100644
> --- a/arch/x86/events/intel/uncore_snbep.c
> +++ b/arch/x86/events/intel/uncore_snbep.c
> @@ -3607,7 +3607,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
>  {
>  	struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
>  	struct extra_reg *er;
> -	int idx = 0;
> +	/* Any of the CHA events may be filtered by Thread/Core-ID.*/
> +	int idx = !!(event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN) ?
> +		     SKX_CHA_MSR_PMON_BOX_FILTER_TID : 0;

Wouldn't something like:

	if (event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN)
		idx = SKX_CHA_MSR_PMON_BOX_FILTER_TID;

be *MUCH* more readable?

>  
>  	for (er = skx_uncore_cha_extra_regs; er->msr; er++) {
>  		if (er->event != (event->hw.config & er->config_mask))
> -- 
> 2.21.3
>