Re: [PATCH] i.MX6: Support 16-bit BT.1120 video input

From: Dan Carpenter
Date: Wed Oct 06 2021 - 04:46:15 EST


On Wed, Oct 06, 2021 at 08:13:48AM +0200, Krzysztof Hałasa wrote:
> @@ -373,11 +387,18 @@ static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg,
> break;
> case V4L2_MBUS_BT656:
> csicfg->ext_vsync = 0;
> + /* UYVY10_1X20 etc. should be supported as well */
> + is_bt1120 = mbus_fmt->code == MEDIA_BUS_FMT_UYVY8_1X16 ||
> + mbus_fmt->code == MEDIA_BUS_FMT_YUYV8_1X16;

Could you align better for readability, otherwise it's harder to spot
the two characters which are swapped between those to macros. (Also
it's basically normal for both sides of a || to be aligned...)

is_bt1120 = (mbus_fmt->code == MEDIA_BUS_FMT_UYVY8_1X16 ||
mbus_fmt->code == MEDIA_BUS_FMT_YUYV8_1X16);

> if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field) ||
> mbus_fmt->field == V4L2_FIELD_ALTERNATE)
> - csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
> + csicfg->clk_mode = is_bt1120 ?
> + IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_SDR :
> + IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
> else
> - csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;
> + csicfg->clk_mode = is_bt1120 ?
> + IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR :
> + IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;
> break;
> case V4L2_MBUS_CSI2_DPHY:
> /*

regards,
dan carpenter