Re: [PATCH 1/1] genirq/cpuhotplug: Bump debugging information print down to KERN_DEBUG

From: Lee Jones
Date: Wed Aug 11 2021 - 03:57:48 EST


On Tue, 10 Aug 2021, Thomas Gleixner wrote:

> On Thu, Jun 17 2021 at 08:31, Lee Jones wrote:
> > This sort of information is only generally useful when debugging.
> >
> > No need to have these sprinkled through the kernel log otherwise.
>
> Yes and no.
>
> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> > Signed-off-by: Lee Jones <lee.jones@xxxxxxxxxx>
> > ---
> > kernel/irq/cpuhotplug.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/kernel/irq/cpuhotplug.c b/kernel/irq/cpuhotplug.c
> > index 02236b13b3599..cf8d4f75632e8 100644
> > --- a/kernel/irq/cpuhotplug.c
> > +++ b/kernel/irq/cpuhotplug.c
> > @@ -42,7 +42,7 @@ static inline bool irq_needs_fixup(struct irq_data *d)
> > * If this happens then there was a missed IRQ fixup at some
> > * point. Warn about it and enforce fixup.
> > */
> > - pr_warn("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n",
>
> This one is clearly a warning as this should not happen. See the
> comments around that.
>
> > + pr_debug("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n",
> > cpumask_pr_args(m), d->irq, cpu);
> > return true;
> > }
> > @@ -166,7 +166,7 @@ void irq_migrate_all_off_this_cpu(void)
> > raw_spin_unlock(&desc->lock);
> >
> > if (affinity_broken) {
> > - pr_warn_ratelimited("IRQ %u: no longer affine to CPU%u\n",
> > + pr_debug_ratelimited("IRQ %u: no longer affine to CPU%u\n",
> > irq, smp_processor_id());
>
> Maybe, but distro people might have opinions on that.

The trouble is, even if these are real warnings, they have an affect
on performance on real products. To the point where so much logging
builds up during pre-release testing, that it sets off the watchdog(s)
on some high profile consumer devices.

What would you suggest?

--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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