RE: [PATCH] doc/arm: take care restore order of GICR_* in ITS restore

[Jianyong Wu]

Hello Marc,

> -----Original Message-----
> From: Marc Zyngier <maz@xxxxxxxxxx>
> Sent: Wednesday, July 21, 2021 5:54 PM
> To: Jianyong Wu <Jianyong.Wu@xxxxxxx>
> Cc: James Morse <James.Morse@xxxxxxx>; Andre Przywara
> <Andre.Przywara@xxxxxxx>; lushenming@xxxxxxxxxx;
> kvm@xxxxxxxxxxxxxxx; kvmarm@xxxxxxxxxxxxxxxxxxxxx; linux-
> doc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Justin He
> <Justin.He@xxxxxxx>
> Subject: Re: [PATCH] doc/arm: take care restore order of GICR_* in ITS
> restore
>
> On Wed, 21 Jul 2021 10:20:19 +0100,
> Jianyong Wu <jianyong.wu@xxxxxxx> wrote:
> >
> > When restore GIC/ITS, GICR_CTLR must be restored after GICR_PROPBASER
> > and GICR_PENDBASER. That is important, as both of GICR_PROPBASER and
> > GICR_PENDBASER will fail to be loaded when lpi has enabled yet in
> > GICR_CTLR. Keep the restore order above will avoid that issue.
> > Shout it out at the doc is very helpful that may avoid lots of debug work.
>
> But that's something that is already mandated by the architecture, isn't it?
> See "5.1 LPIs" in the architecture spec:
>
> <quote>
>
> If GICR_PROPBASER is updated when GICR_CTLR.EnableLPIs == 1, the effects
> are UNPREDICTABLE.
>
> [...]
>
> If GICR_PENDBASER is updated when GICR_CTLR.EnableLPIs == 1, the effects
> are UNPREDICTABLE.
>

I think this "UNPREDICTABLE" related with the "physical machine". Am I right?
In virtualization environment, kernel gives the definite answer that we should not enable GICR_CTLR.EnableLPIs before restoring GICR_PROPBASER(GICR_PENDBASER either)  when restore GIC ITS in VMM, see [1]. Thus, should we consider the virtualization environment as a special case?

[1] linux/arch/arm64/kvm/vgic/vgic-mmio-v3.c
static void vgic_mmio_write_propbase(struct kvm_vcpu *vcpu,
                                     gpa_t addr, unsigned int len,
                                     unsigned long val)
{
        struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
        struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
        u64 old_propbaser, propbaser;

        /* Storing a value with LPIs already enabled is undefined */
        if (vgic_cpu->lpis_enabled)
           return;
...
}

Thanks
Jianyong

> </quote>
>
> The point of this documentation is to make it explicit what is *not* covered
> by the architecture. Anything that is in the architecture still applies, and
> shouldn't be overlooked.
>
> Thanks,
>
>       M.
>
> --
> Without deviation from the norm, progress is not possible.
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