Re: [PATCH v2 6/7] soc: mediatek: mmsys: Add reset controller support

From: kernel test robot
Date: Fri Jul 16 2021 - 04:58:46 EST



Hi Enric,

I love your patch! Perhaps something to improve:

[auto build test WARNING on robh/for-next]
[also build test WARNING on pza/reset/next linux/master linus/master v5.14-rc1 next-20210714]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Enric-Balletbo-i-Serra/Add-support-to-the-mmsys-driver-to-be-a-reset-controller/20210714-181318
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
:::::: branch date: 14 hours ago
:::::: commit date: 14 hours ago
compiler: riscv64-linux-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>


cppcheck possible warnings: (new ones prefixed by >>, may not real problems)

drivers/soc/mediatek/mtk-mmsys.c:104:6: warning: Unused variable: i [unusedVariable]
int i;
^

vim +104 drivers/soc/mediatek/mtk-mmsys.c

2c758e301ed95a Enric Balletbo i Serra 2020-03-25 97 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 98 static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 99 bool assert)
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 100 {
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 101 struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 102 unsigned long flags;
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 103 u32 reg;
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 @104 int i;
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 105 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 106 spin_lock_irqsave(&mmsys->lock, flags);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 107 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 108 reg = readl_relaxed(mmsys->regs + MMSYS_SW0_RST_B);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 109 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 110 if (assert)
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 111 reg &= ~BIT(id);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 112 else
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 113 reg |= BIT(id);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 114 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 115 writel_relaxed(reg, mmsys->regs + MMSYS_SW0_RST_B);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 116 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 117 spin_unlock_irqrestore(&mmsys->lock, flags);
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 118 08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 119 return 0;
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 120 }
08a3068f9490f0 Enric Balletbo i Serra 2021-07-14 121
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