Re: [RFC PATCH v1 05/10] irqchip: Add ACLINT software interrupt driver

From: Marc Zyngier
Date: Mon Jun 14 2021 - 05:38:22 EST


On Sun, 13 Jun 2021 13:25:40 +0100,
Anup Patel <anup@xxxxxxxxxxxxxx> wrote:
>
> On Sun, Jun 13, 2021 at 3:11 PM Marc Zyngier <maz@xxxxxxxxxx> wrote:
> >
> > I'm sorry, but this really isn't an irqchip driver. This is a piece of
> > arch-specific code that uses *none* of the irq subsystem abstractions
> > apart from the IRQCHIP_DECLARE() macro.
>
> Yes, I was not sure we can call it IRQCHIP hence the RFC PATCH.
>
> Both ACLINT MSWI and SSWI are special devices providing only IPI
> support so I will re-think how to fit this.

It depends on how you think of IPIs in your architecture.

arm64 (and even now 32bit) have been moved to a mode where IPIs are
normal interrupts, as it helps with other things such as our pseudo
NMIs, and reduces code duplication. MIPS has done the same for a long
time (they don't have dedicated HW for that).

M.

--
Without deviation from the norm, progress is not possible.