Re: [v1 1/3] dt-bindings: msm/dsi: Add yaml schema for 7nm DSI PHY

From: Rob Herring
Date: Tue Jun 01 2021 - 17:00:39 EST


On Mon, May 31, 2021 at 07:03:53PM +0530, Rajeev Nandan wrote:
> Add YAML schema for the device tree bindings for MSM 7nm DSI PHY driver.
>
> Cc: Jonathan Marek <jonathan@xxxxxxxx>
> Signed-off-by: Rajeev Nandan <rajeevny@xxxxxxxxxxxxxx>
> ---
> .../bindings/display/msm/dsi-phy-7nm.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> new file mode 100644
> index 00000000..f17cfde
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display DSI 7nm PHY
> +
> +maintainers:
> + - Rajeev Nandan <rajeevny@xxxxxxxxxxxxxx>
> +
> +allOf:
> + - $ref: dsi-phy-common.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: qcom,dsi-phy-7nm

When would one use this?

> + - const: qcom,dsi-phy-7nm-7280
> + - const: qcom,dsi-phy-7nm-8150

These don't look like full SoC names (sm8150?) and it's
<vendor>,<soc>-<block>.

> +
> + reg:
> + items:
> + - description: dsi phy register set
> + - description: dsi phy lane register set
> + - description: dsi pll register set
> +
> + reg-names:
> + items:
> + - const: dsi_phy
> + - const: dsi_phy_lane
> + - const: dsi_pll
> +
> + vdds-supply:
> + description: Phandle to 0.9V power supply regulator device node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - vdds-supply
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
> + #include <dt-bindings/clock/qcom,rpmh.h>
> +
> + dsi-phy@ae94400 {
> + compatible = "qcom,dsi-phy-7nm-7280";
> + reg = <0x0ae94400 0x200>,
> + <0x0ae94600 0x280>,
> + <0x0ae94900 0x280>;
> + reg-names = "dsi_phy",
> + "dsi_phy_lane",
> + "dsi_pll";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "ref";
> +
> + vdds-supply = <&vreg_l10c_0p8>;
> + };
> +...
> --
> 2.7.4