[PATCH 02/15] x86/cpufeatures: Define Key Locker sub feature flags

From: Robert Hoo
Date: Tue Jun 01 2021 - 04:49:15 EST


Though KeyLocker is generally enumerated by
CPUID.(07H,0):ECX.KL[bit23], CPUID.19H:{EBX,ECX} enumerate
more details of KeyLocker supporting status.
Define them in scattered cpuid bits.

CPUID.19H:EBX
bit0 enumerates if OS (CR4.KeyLocker) and BIOS have enabled KeyLocker.
bit2 enumerates if wide Key Locker instructions are supported.
bit4 enumerates if IWKey backup is supported.
CPUID.19H:ECX
bit0 enumerates if the NoBackup parameter to LOADIWKEY is supported.
bit1 enumerates if IWKey randomization is supported.

Most of above features don't necessarily appear in /proc/cpuinfo,
except "iwkey_rand", which we think might be interesting to indicate
that the system supports randomized IWKey.

Signed-off-by: Robert Hoo <robert.hu@xxxxxxxxxxxxxxx>
Reviewed-by: Tony Luck <tony.luck@xxxxxxxxx>
Cc: x86@xxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
---
arch/x86/include/asm/cpufeatures.h | 5 +++++
arch/x86/kernel/cpu/scattered.c | 5 +++++
2 files changed, 10 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 578cf3f..8dd7271 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -294,6 +294,11 @@
#define X86_FEATURE_PER_THREAD_MBA (11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
#define X86_FEATURE_SGX1 (11*32+ 8) /* "" Basic SGX */
#define X86_FEATURE_SGX2 (11*32+ 9) /* "" SGX Enclave Dynamic Memory Management (EDMM) */
+#define X86_FEATURE_KL_INS_ENABLED (11*32 + 10) /* "" Key Locker instructions */
+#define X86_FEATURE_KL_WIDE (11*32 + 11) /* "" Wide Key Locker instructions */
+#define X86_FEATURE_IWKEY_BACKUP (11*32 + 12) /* "" IWKey backup */
+#define X86_FEATURE_IWKEY_NOBACKUP (11*32 + 13) /* "" NoBackup parameter to LOADIWKEY */
+#define X86_FEATURE_IWKEY_RAND (11*32 + 14) /* IWKey Randomization */

/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 21d1f06..de8677c 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -38,6 +38,11 @@ struct cpuid_bit {
{ X86_FEATURE_PER_THREAD_MBA, CPUID_ECX, 0, 0x00000010, 3 },
{ X86_FEATURE_SGX1, CPUID_EAX, 0, 0x00000012, 0 },
{ X86_FEATURE_SGX2, CPUID_EAX, 1, 0x00000012, 0 },
+ { X86_FEATURE_KL_INS_ENABLED, CPUID_EBX, 0, 0x00000019, 0 },
+ { X86_FEATURE_KL_WIDE, CPUID_EBX, 2, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_BACKUP, CPUID_EBX, 4, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_NOBACKUP, CPUID_ECX, 0, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_RAND, CPUID_ECX, 1, 0x00000019, 0 },
{ X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
{ X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
{ X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
--
1.8.3.1